Method for locating naked chip and jig structure thereof
A positioning method, bare chip technology, used in conveyor objects, electrical components, semiconductor/solid-state device manufacturing, etc.
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[0056] see Figure 5 As shown, there is a burr 11 on the upper edge of the side surface of the bare chip 1 , which is formed during wafer dicing and splitting. However, the burr 11 can also be eliminated by other processing methods.
[0057] The stacking element 2 is an insulator, such as a color filter that can sufficiently penetrate light. The stacking component 2 is dislocated on the upper surface of the bare chip 1 in a stacking manner, and the stacking component 2 can be fixed on the bare chip 1 by gluing.
[0058] One side of the stack 2 is non-flush with the side corresponding to the bare chip 1, and the upper end surface 12 of the bare chip 1 adjacent to one side of the stack 2 is partially exposed, and this A part of the exposed part is the wire bonding area 13 of the bare chip 1 , and the wire bonding area 13 can be connected with conductive wires.
[0059] The other side of the stack member 2 is not flush with the other side corresponding to the bare chip 1 , and ...
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