Efficient interrupt return address save mechanism
一种返回地址、有效地的技术,应用在下一个指令的地址形成、使用存储的程序进行程序控制、存储器系统等方向,能够解决困难等问题
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[0020] The present invention provides a system, device and method for effectively storing interrupt return addresses in a general-purpose register file. The general purpose register file is under the control of the pipeline. According to the present invention, the general purpose register file can be updated to effectively hold the return address or program counter value of the first instruction in the pipeline when an interrupt request occurs.
[0021] When a processor of the system receives an interrupt request signal, the processor generates a dummy instruction. This directive is handled much like other instructions. It goes down the pipeline and updates the register file by causing the register file to be written with the return address. Since this pseudo-instruction travels down the pipeline like regular instructions, it not only updates the register file but also related resources. No special hardware is required to associate with a register file for holding interrupt...
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