Semiconductor device and method for manufacturing the same

A manufacturing method, semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc.

Active Publication Date: 2009-09-23
GK BRIDGE 1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same

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no. 1 approach

Hereinafter, the structure of the semiconductor device according to the first embodiment of the present invention will be described with reference to the drawings.

[0062] figure 1 (a) to (d) are structural diagrams showing a semiconductor device according to the first embodiment of the present invention, specifically, a semiconductor device having a fin field effect transistor, figure 1 (a) is a plan view, figure 1 (b) for figure 1 (a) A-A line sectional view, figure 1 (c) for figure 1 (a) B-B line sectional view, figure 1 (d) for figure 1 (a) C-C line sectional view.

[0063] The Fin Field Effect Transistor of this embodiment, such as figure 1 As shown in (a) to (d), there is a support substrate 11 made of, for example, silicon, an insulating layer 12 formed on the support substrate 11, for example, made of silicon oxide, and a fin-shaped semiconductor region formed on the insulating layer 12. 13a to 13d, the gate electrode 15 formed on the fin-shaped semico...

no. 1 example

In the first embodiment, by performing plasma doping at a pressure of 0.6 Pa or less, the amount of chipping at the upper corner (fin corner) of the fin-shaped semiconductor region can be suppressed, and the Highly uniform doping characteristics.

[0087] [Suppression of the amount of chipping at the corner of the fin]

First, refer to Figure 4 (a) and (b) explain about suppression of the chipping amount of the fin corner part in the first embodiment.

[0088] Figure 4 (a) schematically shows the cross-sectional shape of the fin-shaped semiconductor region (more precisely, the fin-shaped semiconductor region 51 ) before plasma doping is performed. Here, the height and width of the fins are 120nm and 160nm, and the distance between the fins is 210nm. In other words, the distance between the widthwise center of the fin and the fin widthwise center of the partition wall was 370 nm. Also, the radius of curvature of the fin corners (in the dotted line area in the figure) is 8...

no. 2 example

In the second embodiment, by setting the pressure at the time of plasma doping to 0.6 Pa or more and 10 Pa or less and making the ionization current density Ii (mA / cm 2 ) and the pressure P (Pa) during plasma doping, the relationship is Ii≤0.52Ln(P)+0.36. Plasma doping can achieve high uniform doping while suppressing the amount of chipping at the corner of the fin. Miscellaneous. Also, Ln represents a natural logarithm.

[0105] In the second embodiment, as the fin-shaped semiconductor region (before plasma doping) for checking the chipping amount of the fin-shaped corner portion, the same Figure 4 (a) The same sample as shown in the first embodiment. In other words, the height and width of the fins are 120nm and 160nm, and the distance between the fins is 210nm. In other words, the distance between the center of the fin in the width direction and the center of the fin in the partition wall in the width direction was 370 nm. Also, the radius of curvature of the fin-shaped...

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Abstract

The present invention relates to a semiconductor device and a method for producing the same, capable of obtaining the required properties in the semiconductor device of the fin-shaped semiconductor regions. A gate insulating film (62) is so formed as to straddle a fin-shaped semiconductor region (61) having an impurity region (61a) in the upper portion and an impurity region (61b) in the side portions. The curvature radius r' of the upper corner of a part of the fin-shaped semiconductor region (61) located outside the gate insulating film (62) is larger than the curvature radius r of the upper corner of another part of the fin-shaped semiconductor region (61) located below the gate insulating film (62), but not larger than 2r.

Description

technical field [0001] The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having a three-dimensional structure of a fin-shaped semiconductor region on a substrate and a manufacturing method thereof. Background technique [0002] In recent years, along with higher integration, higher functionality, and higher speed of semiconductor devices, the demand for miniaturization of semiconductor devices has greatly increased. Here, in order to reduce the area occupied by the transistors on the substrate, various element structures are disclosed. Among them, a field effect transistor having a fin structure has attracted attention. A field effect transistor having a fin structure, generally called a fin field effect transistor (field effect transistor), has a thin-walled (fin-shaped) semiconductor region perpendicular to the main surface of the substrate. active area. In the fin field effect tra...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/786H01L21/265H01L21/336
CPCH01L29/66803H01L29/7854H01L21/40H01L29/4232
Inventor 佐佐木雄一朗冈下胜己中本圭一金田久隆水野文二
Owner GK BRIDGE 1
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