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Method for realizing multiprocessor system with hardware semaphore module

A hardware signal, multiprocessor technology, applied in the direction of multiprogramming devices, etc., to achieve low complexity, achieve mutual exclusion and scheduling constraints, and reduce complexity

Inactive Publication Date: 2012-08-22
北京中科银河芯科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0014] In view of this, the main purpose of the present invention is to provide a method for obtaining multiprocessor hardware semaphores, to solve the problem of multiple processors competing for shared storage resources

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  • Method for realizing multiprocessor system with hardware semaphore module
  • Method for realizing multiprocessor system with hardware semaphore module
  • Method for realizing multiprocessor system with hardware semaphore module

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Embodiment Construction

[0036] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0037] In the hardware circuit for realizing the semaphore required by the critical section proposed by the present invention, each semaphore unit in the hardware semaphore module corresponds to one or more shared resources of the multiprocessor system. Each semaphore unit can be accessed by multiple or all processors.

[0038] When the processor performs a read operation on the semaphore module, the semaphore module parses the address corresponding to the read operation, and the semaphore module completes the process of a specific semaphore equivalent to the "read-modify-write" atomic operation, and at the same time, according to the current state of the semaphore Modify the internal state of the semaphore unit and retur...

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Abstract

The invention discloses a method for acquiring hardware signal amount of a multiprocessor, including: a processor performing read operation to a hardware signal amount module, sending read requests containing different specific addresses to the hardware signal amount module to request the hardware signal amount, the different specific addresses indicative of different commands; the hardware signal amount module determining a hardware signal amount unit to be processed according to the received specific addresses, the hardware signal amount unit modifying the interior state according to the action for analyzing the specific addresses, determining the values returning to the processor, and returning the value to the processor; and the processor performing the subsequent treatment according to the received value, wherein the hardware signal amount module is formed by a plurality of hardware signal amount units corresponding to a section of memory address space and having the same function. Compared with other methods, the method is simple and easy for use, is low in complexity and can be conveniently integrated to the designing process of the system.

Description

technical field [0001] The invention relates to the field of multiprocessor systems, in particular to a method for acquiring multiprocessor hardware semaphores. Background technique [0002] Multiprocessor systems, including on-chip multiprocessor systems, where different processors can concurrently access shared resources of the system. A key interaction between hardware and software is in the support of synchronous operations. Synchronous operations include mutexes, point-to-point events, and global events. Different multiprocessor systems provide corresponding hardware primitives to support these synchronization operations. Hardware support has the advantages of speed and efficiency, while software implementation has advantages in flexibility and adaptability to different situations. [0003] When an outcome depends on how two or more processes are scheduled, the code is incorrect and we say there is a race condition. For example, when multiple processes try to acquir...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/46
Inventor 刘建陈杰岳培培
Owner 北京中科银河芯科技有限公司
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