Data receiving/sending method and device

A data receiving method and a receiving chain technology, which are applied in the field of data receiving/sending methods of direct memory access in devices, can solve the problems of loss of data in header identification transmission, difficulty in taking into account system burden and transmission efficiency at the same time in fixed-length transmission, and the like. Data loss, taking into account system load and transmission efficiency, and reducing the effect of load

Active Publication Date: 2011-08-24
DATANG SEMICON DESIGN
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

Fixed-length transmission is difficult to balance system load and transmission efficiency at the same time, and there is a risk of data loss in header identification transmission

Method used

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  • Data receiving/sending method and device
  • Data receiving/sending method and device
  • Data receiving/sending method and device

Examples

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Embodiment Construction

[0046] When using the fixed-length transmission method for DMA operation, if the length of the data frame is set shorter and the length of the transmitted data is greater than the length of the data frame, the more times the DMA transmission is required, the receiver DMA is completed during the data transmission process. The higher the number of interrupts, the more times the processor responds to interrupts, and the greater the burden on the processor. Conversely, if the length of the data frame is set longer and the length of the transmitted data is smaller than the length of the data frame, more invalid data needs to be filled, and the transmission efficiency of valid data will be lower. Therefore, when the DMA operation is performed in a fixed-length transmission mode, it is difficult to balance system burden and transmission efficiency at the same time.

[0047] When the DMA operation is performed by using the header identification transmission method, because only the le...

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Abstract

A data receiving method comprises the steps of establishing a configuration descriptor circular linked list containing two direct memory access (DMA) configuration descriptors; forming a circular receiving chain by utilizing a DMA chain type mode, setting a header as a current configuration descriptor and starting a DMA; responding DMA received data to finish interruption; reconfiguring the current configuration descriptor, resetting the state of an indicating bit according to the value of the indicating bit and the length of the received data and setting the next node as the current configuration descriptor; and waiting for interruption again. The invention effectively integrates the advantages of fixed-length transmission and head mark transmission and realizes random-length transmissionof data through utilizing the chain type DMA and dynamically collocating the DMA receiving length, thereby ensuring both the system load and the transmission efficiency and eliminating the risk of data loss. The invention also discloses a data receiving device, a data sending method and a date sending device.

Description

technical field [0001] The present invention relates to the technical field of data transmission, in particular to a data receiving / sending method and device for Direct Memory Access (DMA, Direct Memory Access). Background technique [0002] DMA is a high-speed data transfer operation that allows data to be read and written directly between external devices and memory, neither through the central processing unit (CPU) nor CPU intervention. The entire data transfer operation is carried out under the control of a so-called "DMA controller". Currently, DMA operations can be performed in the following two ways: [0003] a. Fixed-length transmission, that is, the sender splits the sent data according to the fixed length agreed by the sender and the receiver, and fills invalid data to the fixed length if the fixed length is not enough. When fixed-length transmission is used, since the receiver knows the length of each frame of data sent by the sender in advance, chained DMA can ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/28
Inventor 邹桥崔尧
Owner DATANG SEMICON DESIGN
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