L1/l2 GPS receiver with programmable logic
A receiver and P-code technology, applied in the direction of instruments, measuring devices, satellite radio beacon positioning systems, etc., can solve the problems of high ASIC cost, inability to use, and inability to adapt to new applications, achieve high quality, and reduce hardware complexity sexual effect
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0015] As described above, as the GPS system is evolving, new signals are appearing in the L2 frequency range, and new signals are planned for L1. Consumers will benefit from a versatile receiver capable of handling signals of various configurations.
[0016] Accordingly, embodiments of the present invention include GPS receivers that can utilize programmable logic such as Field Programmable Gate Arrays (FPGAs) to perform functions such as multi-channel digital processing of navigation signals, as opposed to past developments dedicated to such functions. integrated circuit (ASIC) solutions. Programmable logic can be connected to a programmable central processing unit (CPU) via conventional buses and control signals, and can receive an operating profile from the CPU at each power-on start and can be reconfigured at any time. Configuration files can be stored in programmable read-only memory (PROM). The CPU can be connected to the PROM through conventional buses and control si...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 