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Reset signal filter

A technique for resetting signals and filters, applied in multiple input and output pulse circuits, etc., to solve problems such as input noise filtering

Inactive Publication Date: 2011-11-02
NOVATEK MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, if the external power supply of the IC chip is relatively unstable or the circuit noise is too large, the Schmitt trigger buffer 12 cannot filter the larger input noise, and the voltage value of the larger noise oscillates lower than V- or higher than The voltage range of V+, so that the operation of the IC chip enters the reset state arbitrarily

Method used

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Embodiment Construction

[0031] Please refer to image 3 , image 3 It is a block diagram of the first embodiment of the reset signal filter of the present invention, wherein the reset signal filter 30 includes a reset signal detector 25. The reset signal filter 30 is coupled to the output end of the Schmitt trigger buffer (Schmitt trigger buffer) 22, and uses the characteristics of this buffer and the reset signal filter 30 to filter the noise of the input signal PIN_RST of the IC chip to A stable reset signal INT_RST is generated. The Schmitt trigger buffer 22 and the reset signal filter 30 are arranged inside the IC chip, and are connected to the reset circuit 24 outside the IC chip through a pin (input signal PIN_RST) outside the IC chip. The reset circuit 24 is usually a resistor Components and capacitive components are connected in series. The reset signal detector 25 includes a non-reset state detection circuit (non-reset state detection circuit) 27 and a reset state detection circuit (reset st...

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Abstract

The invention relates to a reset signal filter, which comprises a supply voltage detector and a reset signal detector or only comprises the reset signal detector. The supply voltage detector comprises a comparer and a basic logic gate (such as an AND gate, a disjunction gate, a phase inverter and the like). The reset signal detector comprises a comparer, N triggers connected in series, the AND gate, the disjunction gate, a multiplexer and an output trigger. The reset signal filter receives a first reset signal generated by the supply voltage detector or a Schmitt trigger buffer, temporarily stores the first reset signal in a signal level of N cycle times by using the N triggers, and judges whether the first reset signal has the condition of state conversion in the N cycle times so as to output a final reset signal.

Description

Technical field [0001] The present invention relates to a device for resetting a signal filter and a related method flow thereof, in particular to a reset signal filter that stabilizes the reset signal generated by the Schmitt trigger buffer or the general reset signal. Background technique [0002] Generally, the reset signal source of an IC chip is mostly a delay signal generated by a circuit composed of built-in or external resistors and capacitors in the IC chip, and then generated by a buffer element with Schmitt trigger characteristics inside the IC chip. The main disadvantage of this traditional design method is that the IC chip may easily enter the reset state due to the instability of the external power supply of the IC chip or the noise of the system circuit. [0003] Please refer to figure 1 , figure 1 It is a schematic diagram of a prior art reset circuit. The external reset circuit of the IC chip is composed of a resistive element and a capacitive element in series, a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K5/22
Inventor 詹政勋林哲立
Owner NOVATEK MICROELECTRONICS CORP