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Universal digital block interconnection and channel routing

A digital block, horizontal channel technology, applied in the direction of electrical digital data processing, calculation using number system representation, logic circuit using specific components, etc.

Active Publication Date: 2014-06-18
CYPRESS SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Current PSoC architectures offer only coarse-grained programmability with only a few fixed functions utilizing only a few connectivity options

Method used

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  • Universal digital block interconnection and channel routing
  • Universal digital block interconnection and channel routing
  • Universal digital block interconnection and channel routing

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Experimental program
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Embodiment Construction

[0021] introduce

[0022] New programmable routing scheme provides improved routing between Universal Digital Blocks (UDBs) and between UDBs and other microcontroller components, peripherals, and external input and output (I / O) in the same integrated circuit (IC) connectivity. The routing scheme increases the number of functions and the overall routing efficiency of the programmable architecture. UDBs may be grouped in pairs and share associated horizontal routing lanes. Bi-directional horizontal and vertical segmentation elements extend routing horizontally and vertically between different UDB pairs and to other peripherals and I / O.

[0023] A detailed description

[0024] figure 1 is a high-level view of a universal digital block (UDB) array 110 contained within a programmable system-on-chip (PSoC) integrated circuit (IC) 100 . UDB array 110 includes a programmable interconnect matrix 130 that connects different UDBs 120 together. Individual UDBs 120 each contain uncom...

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Abstract

A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I / Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I / O.

Description

[0001] This application claims priority to provisional application serial no. 60 / 912,399, filed April 17, 2007, and pending U.S. application serial no. 11 / 965,291, filed December 27, 2007, both of which Both are incorporated herein by reference. technical field [0002] The present invention relates generally to programmable devices, and more particularly, to programmable interconnect matrices. Background technique [0003] Field Programmable Gate Arrays (FPGAs) and Programmable Logic Devices (PLDs) have been used in data communication and telecommunications systems. Conventional PLDs and FPGAs consist of arrays of programmable elements programmed to implement fixed functions or equations. Some currently available complex PLD (CPLD) products include arrays of logic cells. Conventional PLD devices have several drawbacks, such as limited speed and limited data processing capabilities. [0004] When developing complex integrated circuits, additional peripheral units are usua...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/38
CPCH03K19/177G06F13/28G06F13/4009
Inventor 瓦伦·辛德伯特·苏兰哈尼夫·穆罕默德
Owner CYPRESS SEMICON CORP