Method and device for clock division

Abstract

The invention discloses a method for clock division, which comprises the following steps: fixing the current division coefficient at real time through the input clock signals and the output clock information, counting the input clock signals through the integer part and the decimal part of the division coefficient and the decimal carry threshold value of the decimal part, according to the counting result, beginning accumulative counting which takes the decimal part as the accumulated value, and finally controlling the output clock according to the counting result and the accumulative counting result. The invention further discloses a clock division device. Through the method and the device, the output signals can be dynamically adjusted according to the input signals, and the precision of the division coefficient can be adjusted by increasing the bit widths of the integer part and the decimal part of the division coefficient and the decimal carry threshold value of the decimal part according to needs.

Description

technical field [0001] The present invention relates to clock frequency division technology, in particular to a clock frequency division method and device. Background technique [0002] To implement clock frequency division in the communication field, a frequency divider is required. The principle of the frequency divider is as follows: when the int(∑b) is accumulated to an integer each time, the frequency divider will output the clock period according to the formula (1) For the frequency division time of To, adding one more input clock cycle Ti will make the clock cycle of the output clock cycle To smaller. [0003] ∑To=(∑a+int(∑b))*Ti+mod(∑b)*Ti (1) [0004] Among them, mod is the remainder function, int is the rounding function, Ti represents the input clock cycle, To represents the output clock cycle, a is the integer part after frequency division processing, and b is the fractional part after frequency division processing. [0005] In practical applications, the fract...

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Problems solved by technology

[0010] The above clock frequency division method is based on the assumption that the frequency division coefficient Ki is fixed, and can only be used in occasions where the frequency division coefficient is fixed, and generally the fractional part bi only supports 1-2 digits of numerical accuracy, and the frequency division accuracy Low, it is difficult to meet the requirements of high frequency division accuracy, many decimal places, and the need to dynamically adjust the frequency division coefficient in the application of clock recovery in the communication field such as packet networks

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