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Power semiconductor devices with mesa structures and buffer layers including mesa steps

A buffer layer and mesa technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, transistors, etc., can solve the problem of reduced output rate

Active Publication Date: 2010-10-06
沃孚半导体公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Non-uniform RIE etch rates can partially or completely etch away base material near the periphery of the wafer, which can cause a substantial reduction in yield

Method used

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  • Power semiconductor devices with mesa structures and buffer layers including mesa steps
  • Power semiconductor devices with mesa structures and buffer layers including mesa steps
  • Power semiconductor devices with mesa structures and buffer layers including mesa steps

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Embodiment Construction

[0031] Embodiments of the invention will now be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout.

[0032]It will be understood that although the terms first, second etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention. As used herein, the wo...

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PUM

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Abstract

A bipolar junction transistor includes a collector having a first conductivity type, a drift layer having the first conductivity type on the collector, a base layer on the drift layer and having a second conductivity type opposite the first conductivity type, a lightly doped buffer layer having the first conductivity type on the base layer and forming a p-n junction with the base layer, and an emitter mesa having the first conductivity type on the buffer layer and having a sidewall. The buffer layer includes a mesa step adjacent to and spaced laterally apart from the sidewall of the emitter mesa, and a first thickness of the buffer layer beneath the emitter mesa is greater than a second thickness of the buffer layer outside the mesa step.

Description

[0001] related application [0002] This application claims the benefit of and priority to U.S. Provisional Patent Application No. 60 / 986,694, filed September 9, 2007, entitled "SILICONCARBIDE BIPOLAR JUNCTION TRANSISTOR," the disclosure of which is hereby incorporated by reference in its entirety content. [0003] Statement of Government Interests [0004] This invention was made with support from the United States Government under contract no. W911NF-04-2-0022 awarded by the Army Research Laboratory. The US Government has certain rights in this invention. technical field [0005] The present invention relates to microelectronic devices, and more particularly to power semiconductor devices. Background technique [0006] High voltage silicon carbide (SiC) devices are capable of handling voltages above about 600V or greater. Depending on their active area, such devices can handle as much as about 100 amps or more. High voltage SiC devices have many important applications...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/73H01L21/04
CPCH01L29/0661H01L29/66068H01L29/732H01L29/0804H01L29/1608H01L29/73
Inventor 张清纯A·K·阿加沃尔
Owner 沃孚半导体公司