Circuit for cross clock domain accessing of AHB bus equipment to APB bus equipment

Abstract

The invention relates to a circuit and a method for cross clock domain accessing of AHB bus equipment to APB bus equipment, wherein the circuit comprises an AHB bus interface, an APB bus interface and a clock synchronizing circuit, wherein the AHB bus interface is used as a control terminal of the circuit and works in the AHB clock domain; the APB bus interface is used as an accessed terminal of the circuit and works in the APB clock domain; and the clock synchronizing circuit synchronizes the marking signals of the AHB bus clock domain to the APB bus clock domain, outputs the marking signalsas control signals to the APB bus interface after processing, synchronizes the marking signals of the APB bus clock domain back to the AHB bus clock domain, and returns the marking signals as transmission completion signals to the AHB bus interface. By adopting the technical scheme of the invention, the AHB bus equipment and the APB bus equipment can operate under two different random clock domains, thus reducing the power consumption. The circuit and the method do not need to increase much hardware expense, and can realize cross clock domain accessing of the AHB bus equipment to the APB bus equipment by only increasing 6 triggers.

Description

technical field [0001] The invention relates to a circuit and a method for AHB bus equipment to access APB bus equipment across clock domains. Background technique [0002] There are multiple peripheral function modules in a system on chip (SOC System On Chip), such as various external interfaces and controllers. The processor accesses these functional modules through the bus, controls the operation of the hardware or reads the required information from the outside. Since different functional modules require different bus control logics, each hardware module and processor are respectively located on different buses. For example, modules that require bus control functions such as burst transmission are connected to the AHB (Advanced High-Performance Bus) bus, while modules such as SPI (Serial Peripheral Interface) that only require simple control logic are connected to the APB (Advanced Peripheral Bus) ) bus, the processor (connected to the AHB bus) accesses the devices on ...

AI Technical Summary

Problems solved by technology

However, the clock frequency required by many functional devices on the APB bus is much lower than that of the functional devices on the AHB bus, making these devices run at the same clock frequency as the AHB bus increases unnecessary system power consumption, and this method requires The data transmission is completed at one time according to the rhythm, which increases the potential error risk of the system

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