Method for making through hole in integrated circuit

Abstract

The invention discloses a method for making a through hole in an integrated circuit. The method comprises the following steps of: making a metal layer, a metal coating, a first dielectric layer and a first dielectric anti-reflective layer from bottom to top in turn; making a second dielectric layer on the first dielectric anti-reflective layer; making a second anti-reflective layer on the second dielectric layer; coating photoresist on the second anti-reflective layer; making the through hole penetrating to the metal coating by lithography and etching processes; removing the photoresist and the second anti-reflective layer; depositing a filler of the through hole; performing back-etching on the filler and the second dielectric layer, so that the filler is still higher than the upper surface of the first anti-reflective layer after the second dielectric layer is removed; coating the photoresist; and making an upper structure. By using the method, the position of the filler of the through hole is higher than the first anti-reflective layer so as to avoid the residue of the photoresist in the through hole in a subsequent process and improve the process control of subsequent wiring groove etching.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for manufacturing a through hole in an integrated circuit. Background technique [0002] In the dual-damascene process (dual-damascene) of back-end-of-line (BEOL) metal connection fabrication of semiconductors, one of the process flow is to etch the via (via) to the lower metal cover layer first, and then Then fill the via hole with a material with good hole filling properties, such as Barc (bottom anti-reflection coating, bottom anti-reflection layer), so as to protect the covering layer at the bottom of the via hole when etching the metal wiring groove above the via hole and underlying metal. The process is as Figure 1 to Figure 4 as shown, figure 1 Among them, from bottom to top are metal layer 1, metal covering layer 2, dielectric layer 3 and anti-reflection layer 4; coating photoresist 5 on the anti-reflection layer 4, such as figure 2 Shown; Then make ...

AI Technical Summary

Problems solved by technology

Affected by the pattern-effect, the photoresist in the connecting hole under the metal wiring groove of certain specific size and pattern is difficult to be fully exposed or developed and remains in the through hole, such as Figure 7 As shown, it is very difficult to control the subsequent metal wiring groove etching process

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