Memory and data backup method thereof
A technology of data backup and storage, which is applied in the direction of electrical digital data processing, redundancy in calculation, data error detection, instruments, etc., which can solve the problem of insufficient data confidentiality, increased data backup costs, and the utilization rate of flash memory 18 Low-level problems, to achieve the effect of improving safety and reducing costs
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[0012] Such as figure 2 Shown is a hardware architecture diagram of the memory used in the data backup method of the present invention. The memory 5 is connected to the north bridge 11 through a connector (such as a PCI-E interface) 12, and the north bridge 11 is connected to the memory 10 through a data line (such as a DDR2 data line). Wherein, the memory 5 includes: a backup power supply 13, a power supply controller 14, a power supply control program 15, a system control chip (such as System-on-Chip, SoC) 16, a field programmable gate array (Field Programmable Gate Array, FPGA) 17. Flash memory (Flash Memory) 18, step-down circuit (such as Point of Load, POL circuit) 19, memory module 20, etc. In this embodiment, the memory module 20 is: DDR2 DIMM (Dual In-line Memory Modules, dual in-line memory module), and the power control program 15 can be solidified in a chip, such as a PROM (Programmable Read- Only Memory, programmable read-only memory).
[0013] System control c...
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