Multi-central processing unit (CPU) heartbeat detection system and method

Abstract

The invention discloses multi-central processing unit (CPU) heartbeat detection system and method. The system comprises more than one CPUs and a programmable logic device (PLD), wherein the CPUs are used for sending pulse signals as the heartbeat to the PLD; the PLD is used for receiving the pulse signals sent by each CPU, detects working condition of each CPU in accordance with the pulse signals sent by each CPU so as to obtain high-low level signals for representing the working condition of each CPU, as well as sends results acquired by carrying out logic or OR or AND on the high-low level signals to each CPU. The invention also discloses multi-CPU heartbeat detection. The system and method is used to realize heartbeat detection on the multi-CPU system, and reduce hardware cost and software working load, thus having strong generality.

Description

technical field [0001] The invention relates to a central processing unit (CPU) state detection technology, in particular to a multi-CPU heartbeat detection system and method. Background technique [0002] At present, multi-CPU systems are increasingly used in electronic product design. In order to maintain the normal working status of the multi-CPU system, each CPU in the system needs to obtain the working status of other CPUs in a timely and accurate manner. At the same time, each CPU also needs to feedback its own working status to other CPUs in a timely and accurate manner. If a CPU fails and other CPUs fail to obtain the CPU's fault information in time, they cannot deal with the fault in time, which may cause the fault to expand and even cause the entire system to crash. Generally, the transfer of this working state between each CPU is called heartbeat. If the heartbeat exists, it means that each CPU in the multi-CPU system is in a normal working state, that is, the mu...

AI Technical Summary

Problems solved by technology

[0004] From the above analysis, it can be seen that the existing hardware interface to detect heartbeat is actually to transmit the heartbeat through the corresponding hardware interface. Generally, the relationship between hardware interfaces is point-to-point, and it is necessary to add an additional hardware interface converter to realize the heartbeat. transfer, which adds additional cost and hardware design effort

[0005] In addition, since the message representing the heartbeat is additionally added at the protocol level of the hardware interface, after each CPU receives the message, it also needs to add a specific software judgment link to identify the message, so as to complete the detection of the heartbeat. detection, which increases the workload of software design

[0006] Finally, the specific hardware interface is generally the next-generation peripheral component expansion interface (PCIE) or Ethernet interface. These two hardware interfaces exist in mid-to-high-end CPU systems, but may not exist in some low-end CPU systems. Therefore, the existing heartbeat detection method has certain limitations.

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