Composite radix DFT (Discrete Fourier Transform) and IDFT (Inverse Discrete Fourier Transform) quick implementation method and device

Abstract

The invention discloses a composite radix DFT (Discrete Fourier Transform) and IDFT (Inverse Discrete Fourier Transform) quick implementation method and device. According to the invention, a full sequence reading address is generated for a first stage of DFT operation, thus facilitating reading of an original address in the subsequent operation; two intermediate caches are configured for each stage of DFT operation for alternately storing butterfly operational data; and inter-stage flow control is adopted, so that the next stage of operation is performed before the current stage of processing is finished, i.e. the next stage of operation is performed when the current stage of operation is performed and the conditions for performing the next stage of operation are met, thereby greatly increasing the computing speed and saving the processing time without increasing the required overall storage capacity.

Description

technical field [0001] The present invention relates to the field of mobile communication, in particular to a high-speed hardware implementation scheme for the fixed-point implementation of DFT (Discrete Fourier Transform, discrete Fourier Transform) and IDFT (Inverse Discrete Fourier Transform, inverse discrete Fourier Transform) algorithms of digital signal processing systems. Background technique [0002] In digital signal processing, especially for finite-length sequences, DFT is a particularly important mathematical transformation. Its essence is the finite-point discrete sampling of finite-length sequence Fourier transform, which opens up the way of discretization in the frequency domain and makes digital signal processing The method of digital operation can be adopted in the frequency domain, which greatly increases the flexibility of digital signal processing. DFT is widely used in various fields such as digital communication, speech signal processing, image processi...

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Problems solved by technology

[0005] The existing mixed-radix DFT algorithm usually uses two memories and performs a ping-pong operation between them to realize the operation of each level, such as figure 1 As shown, the data is read from the memory 1, after the butterfly operation, the result data is stored in the memory 2, the first stage operation is completed, and then read from the memory 2, after the butterfly operation, it is stored in the memory 1, and the second stage is completed The two-level calculation, switching in this way, completes the calculation at all levels, but this processing method needs to be completed after the previous level of calculation is completed before the next level of calculation can be performed. takes a long time

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