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Synchronizing SIMD vectors

A vector, data element technique used in the field of microprocessors and other processing devices

Inactive Publication Date: 2011-06-22
INTEL CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

To further complicate this sharing of data and resources, most modern processing devices include one or more dedicated cache memories

Method used

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  • Synchronizing SIMD vectors
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  • Synchronizing SIMD vectors

Examples

Experimental program
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Embodiment Construction

[0039] In the following description, numerous specific details are set forth, such as specific instructions, instruction formats, devices such as registers and memory, etc., in order to provide a thorough understanding of the examples provided herein. However, it will be apparent to those skilled in the art that the present invention may be practiced without these specific details.

[0040] One method for determining whether a semaphore is locked (and / or causing it to be locked) is by using a read-modify-write sequence (or operation). However, one problem with read-modify-write implementations is the acquisition and release of the semaphore mechanism itself. That is, when a process tries to gain control of a shared memory space, it first reads the lock value, checks and modifies (if allowed) the value, and writes the modified value back to the lock. It is generally desirable to perform read-modify-write operations as atomic operations (ie, once started, complete without inter...

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PUM

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Abstract

A vector compare-and-exchange operation is performed by: decoding by a decoder in a processing device, a single instruction specifying a vector compare-and-exchange operation for a plurality of data elements between a first storage location, a second storage location, and a third storage location; issuing the single instruction for execution by an execution unit in the processing device; and responsive to the execution of the single instruction, comparing data elements from the first storage location to corresponding data elements in the second storage location; and responsive to determining a match exists, replacing the data elements from the first storage location with corresponding data elements from the third storage location.

Description

technical field [0001] The present disclosure relates to microprocessors and other processing devices, and more particularly, to synchronization of SIMD vectors. Background technique [0002] Multiple threads and / or processing units (hereinafter referred to as agents) in a system, for example including a multi-threaded processor, multiple processing devices and / or multi-core processors, often need to share resources and data stored in the system. Take care to ensure that agents access the most recently updated data, and that agents do not access and modify data currently associated with another agent. To further complicate this data and resource sharing, most modern processing devices include one or more dedicated cache memories. In multi-processor and multi-core systems, these on-chip caches will often, and indeed generally do, contain multiple copies of a data item. Therefore, when a proxy accesses a copy of a data item, be sure to read an updated or valid data value. ...

Claims

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Application Information

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IPC IPC(8): G06F17/16G06F13/16
CPCG06F9/30021G06F9/06G06F17/16G06F9/30032G06F13/16G06F9/30036G06F9/3004G06F9/30087G06F9/30038G06F9/30043G06F15/8007G06F15/80G06F12/0815G06F9/30
Inventor R·拉瓦尔A·T·福西思
Owner INTEL CORP
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