Three-dimensional semiconductor memory device

Abstract

Provided is a three-dimensional semiconductor memory device. The three-dimensional semiconductor memory device includes a substrate that has a cell array region including a pair of sub-cell regions and a strapping region interposed between the pair of sub-cell regions. A Plurality of sub-gates are sequentially stacked on the substrate in each of the sub-cell regions, and interconnection components are electrically connected to extensions of the stacked sub-gates, respectively, which extend into the strapping region. Each of the interconnection components is electrically connected to the extensions of the sub-gate which are disposed in the pair of the sub-cell regions, respectively, and which are located at the same level.

Description

[0001] This application claims priority for Korean Patent Application No. 10-2009-0110975 filed with the Korean Intellectual Property Office on November 17, 2009, and the disclosure of this application is incorporated herein by reference. Technical field [0002] The present invention relates to semiconductor devices, and more particularly, to three-dimensional semiconductor storage devices. Background technique [0003] With the rapid development of the electronics industry, the requirements for the integration of semiconductor storage devices are constantly increasing. Integration is an important factor in determining product prices. For example, as the degree of integration increases, the price of semiconductor storage devices will decrease. For this reason, semiconductor devices especially require higher integration. Generally, since the integration degree of a semiconductor device can be determined by the two-dimensional area of ​​a unit memory cell, the integration degree ...

AI Technical Summary

Problems solved by technology

However, this new structure poses various problems, such as reduced reliability and / or reduced operating speed of the product

Images