Duty cycle correction circuit

Abstract

The invention provides a duty cycle correction circuit which can correct the duty cycle of input square wave to be 50%. The duty cycle correction circuit comprises a first charge pump, a second charge pump, a third charge pump, a mean circuit and a comparison circuit. When one of the first charge pump and the second charge pump is charged to obtain a voltage value at high level of a square wave cycle; when the other one of the first charge pump and the second charge pump is charged to obtain the other voltage valve at low level of the square wave cycle; the two voltage values are averaged to obtain a mean voltage; and then the third charge pump is charged to the mean voltage, wherein the required time is just a half of the cycle, thus a square signal with a duty cycle being 50% is obtained.

Description

【Technical field】 [0001] The invention relates to the field of circuit design, in particular to a duty ratio correction circuit. 【Background technique】 [0002] Many digital circuits receive a clock signal to operate. In memory circuits operating at high frequencies, it is very important to use a clock signal with a duty cycle of about 50% in order to keep the parts working in synchrony. In addition, there are many applications that need to use a 50% duty cycle clock signal, so I won't list them all here. [0003] Usually the clock signal is provided by an oscillator, such as a crystal oscillator and a clock circuit, but the clock signal provided by the oscillator and the clock circuit generally does not have a 50% duty cycle, for example, the clock signal may have a 40% duty cycle, The high-level phase is 40% of a clock cycle, and the low-level phase is the remaining 60% of the clock cycle. In order to obtain a clock signal with a duty cycle of 50%, there are many duty c...

AI Technical Summary

Problems solved by technology

[0004] However, the existing duty cycle correction circuits generally have complex structures

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