Pulse generating circuit

Abstract

The invention discloses a pulse generating circuit comprising a trigger, a delay circuit, an OR door, a first buffer and a second buffer, wherein the data input end of the trigger is connected with a power supply voltage, a clock control end of the trigger is connected with an input signal, and a data output end of the trigger is connected with the input end of the delay circuit and the input endof the first buffer; a zero clearing end of the delay circuit is connected with a zero clearing signal, and an output end of the delay circuit is connected with the input end of the second buffer andone input end of the OR door; the other input end of the OR door is connected with the zero clearing signal, and the output end of the OR door is connected with the zero clearing end of the trigger; and the period of the input signal is not less than the sum of the rising delay time, the descending delay time and the recovering time of the delay circuit. The pulse generating circuit provided by the invention can generate accurate pulses and simultaneously generate two pulse signals and is simple in realization.

Description

technical field [0001] The invention relates to electronic circuit technology, in particular to a pulse generating circuit. Background technique [0002] The existing pulse generation circuit usually uses the input signal and its delayed signal to do a logic operation to generate it, which requires that the input signal cannot change during the delay process. If the input signal changes during the delay process and delays The subsequent signal has no time to change, and eventually the correct pulse signal cannot be obtained. Contents of the invention [0003] The technical problem to be solved by the present invention is to provide a pulse generating circuit, which can generate accurate pulses and can generate two pulse signals at the same time, which is simple to implement. [0004] In order to solve the above-mentioned technical problems, the pulse generating circuit of the present invention includes a flip-flop, a delay circuit, an OR gate, a first buffer, and a second...

AI Technical Summary

Problems solved by technology

[0002] The existing pulse generation circuit usually uses the input signal and its delayed signal to do a logic operation to generate it, which requires that the input signal cannot change during the delay process. If the input signal changes during the delay process and delays The subsequent signal has no time to change, which will eventually lead to the inability to obtain the correct pulse signal

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