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Formation method for contact hole

A contact hole, dry etching technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of the conductive material not completely covering the contact hole, poor electrical characteristics of the contact hole, low corrosion rate, etc. The effect of reducing damage, reducing concentration, and improving contact electrical characteristics

Active Publication Date: 2015-01-21
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology

[0007] However, in the method for forming the above-mentioned contact hole, for wet cleaning, the nitride has a much lower corrosion rate than the oxide layer, so it will cause the sidewall of the contact hole to form a depression in the oxide layer during the cleaning step, As a result, when the conductive material is filled into the contact hole, the conductive material cannot completely cover the contact hole, so that the electrical characteristics of the contact hole are poor

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  • Formation method for contact hole
  • Formation method for contact hole
  • Formation method for contact hole

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Embodiment Construction

[0034] It can be seen from the background technology that in the existing steps of forming contact holes, the cleaning step is usually used to remove the polymer when etching the contact holes, but for cleaning or wet etching, compared with the oxide layer 110, the nitride 120 It has a much lower etching rate, so the cleaning step will cause the sidewall of the contact hole to form a depression in the oxide layer, so that when the conductive substance is filled into the contact hole, the conductive substance cannot completely cover the contact hole, so that the contact hole The electrical characteristics are poor.

[0035] The inventor of the present invention obtained a method for forming a contact hole through a large number of experimental studies, comprising the steps of: providing a semiconductor structure, which includes a substrate; a MOS device located in and on the substrate; a layer covering the MOS device and the substrate An interlayer dielectric layer, the interla...

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Abstract

The invention discloses a formation for a contract hole, which comprises the following steps: providing a semiconductor structure which comprises a substrate, MOS (metal oxide semiconductor) devices arranged in the substrate and on the substrate, an interlayer dielectric layer which covers the MOS devices and the substrate and comprises an oxide layer and a nitride layer arranged on the oxide layer; etching the interlayer dielectric layer, stopping etching on the surface of the substrate, forming a through hole in the interlayer dielectric layer and forming an etched polymer in the through hole during etching; carrying out dry etching on the etched polymer and the substrate exposed out of the through hole to lead the through hole to extend into the substrate; and washing with acid solution so as to remove the etched polymer remained in the through hole. The formation method reduces the damage on the side wall of the contact hole and improves the properties of contact electricity of the bottom of the contact hole.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a contact hole. Background technique [0002] The manufacture of semiconductor integrated circuits is an extremely complex process, the purpose of which is to reduce the various electronic components and circuits required for a specific circuit on a small-area wafer. Wherein, each component must be electrically connected by an appropriate interconnecting wire, so as to exert the desired function. [0003] As the production of integrated circuits develops toward ultra-large-scale integrated circuits (ULSI), the internal circuit density is increasing. As the number of components contained in the chip continues to increase, the available space for surface wiring is actually reduced. The solution to this problem is to adopt a multi-layer metal wire design, and use a multi-layer connection in which a multi-layer insulating layer and a conducti...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
Inventor 杨昌辉奚裴肖海波
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP