Level shift circuit

Abstract

The invention provides a level shift circuit which is used for shifting high-level input signal into low-level output signal. The level shift circuit comprises: VDDH, VDDL, GND, a shaping circuit and an output circuit. A first stage inverter unit of the shaping circuit comprises a pair of PMOS transistors, a first pair of NMOS transistors and a second pair of NMOS transistors. Drain electrodes of the pair of PMOS transistors are connected with grid electrodes of each other and source electrodes are connected with the VDDH. The first pair of NMOS transistors is connected in series with the second pair of NMOS transistors respectively, wherein the grid electrodes of the series-connected NMOS transistors are mutually connected with each other. The source electrodes of the first pair of NMOS transistors are grounding. The drain electrodes of the second pair of NMOS transistors are respectively connected with the drain electrodes of the pair of PMOS transistors. And the grid electrodes of the second pair of NMOS transistors are respectively connected with input terminal and output terminal of a finally stage inverter unit of the shaping circuit. The second pair of NMOS transistors is depletion-type thick grid transistors. The first pair of NMOS transistors is thin grid type transistors. The level shift circuit has a high speed responsibility and a small circuit delay.

Description

technical field [0001] The invention relates to a level shift circuit, in particular to a level shift circuit for converting a low-level signal into a high-level signal. Background technique [0002] In composite power supply circuits, especially SOC systems, the power supply voltage of each circuit unit is not completely consistent, and it is difficult to unify. The signal transmission between each circuit unit needs to be converted before communication can be carried out; The working voltage inside the chip (for example, 1.2V), but when transmitting signals between chips, it still needs to be carried out at a higher voltage (for example, 3.3V ~ 5V). Therefore, it is necessary to use a level conversion circuit as an input and output interface device of a chip or a circuit unit to realize the level conversion of the above-mentioned signals. [0003] In digital circuits, CMOS inverters are often used to form level conversion circuits. For example figure 1 An existing level...

AI Technical Summary

Problems solved by technology

[0007] The problem solved by the present invention is to provide a level conversion circuit with fast response speed and small circuit delay, which solves the proble

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