Method and system for estimating integer multiples of frequency offsets
An integer frequency offset and estimated value technology, which is applied in the field of integer frequency offset estimation, can solve the problems of carrier frequency offset sensitivity, high hardware implementation complexity, and the traditional method cannot be directly realized, so as to improve the accuracy and stability. , The operation process is fast, and the hardware realizes the simple effect.
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Embodiment 1
[0027] a. Receive all synchronous symbols of each frame (no frame has two synchronous symbols), obtain the relational expression 1 between each synchronous symbol and the frequency-domain synchronous symbol sent (by the first synchronous symbol r of each frame sync (1, n) as an example, the relational expression of the second synchronization symbol can be deduced by analogy): where X sync (1, k) is the frequency domain synchronization symbol, N sync is the number of subcarriers in the first sync symbol, H(k) is the channel function, is the normalized frequency offset, is the carrier wave during modulation.
[0028] In order to ensure robustness in practical applications, the symbol timing deviation and sampling frequency deviation are added to the received synchronous symbol relational formula, and the first synchronous symbol r of each frame is sync (1, n) as an example calculation formula 2 is: where the symbol timing offset is n o , and the normalized sampling fre...
Embodiment 2
[0045] The integer multiple frequency offset estimation system used in Embodiment 1 of the present invention includes a conjugate unit, a storage unit and a decision unit in the system. Wherein the conjugate unit is used to realize z of calculation formula 5 in embodiment 1 sync (1,m+1)z * (1, m) part, storage unit is used for realizing computing formula 5 in embodiment 1 Partly, the conjugation unit includes a conjugation module receiving an input signal and a first multiplication module, a delay module is connected between the conjugation module and the first multiplication module, and the signal passes through the first multiplication module To the storage unit, the storage unit includes a storage module, the storage module includes a 2048-bit dual-port RAM and a 2048-bit dual-port ROM, and the dual-port RAM and dual-port ROM are controlled by the control module in the storage unit. After the signal is stored in the storage module, the peak value is obtained by the secon...
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