Microcontrollers with Special Grouped Instructions

A microcontroller and instruction technology, applied in instruction analysis, program control design, instruments, etc., can solve the problem of disconnected data memory

Active Publication Date: 2011-12-14
MICROCHIP TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, microcontrollers using the concept of memory grouping are further faced with the problem that many special function registers used, for example, to control these peripherals and internal

Method used

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  • Microcontrollers with Special Grouped Instructions
  • Microcontrollers with Special Grouped Instructions
  • Microcontrollers with Special Grouped Instructions

Examples

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Embodiment Construction

[0031] In accordance with the teachings of the present invention, a non-memory mapped bank select register (BSR) is provided for selecting one of a plurality of memory banks for direct addressing. Memory-mapped registers are used for indirect addressing independent of the selected memory bank. The addition of specialized grouping instructions (e.g., "move literal into BSR register (MOVLB)") allows all data bytes in a bank of memory to be used for general purpose data, and thus, allows strides that do not contain any mapped special functions Contiguous addressing of multiple memory banks of registers. Therefore, the BSR registers that select the active memory bank are not mapped in the data registers, but may be accessed with specialized commands.

[0032] Therefore, multiple memory banks are available that do not have or require special registers. This allows indirect addressing of adjacent banks of memory via indirect addressing registers (FSRs) without having to worry abou...

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Abstract

An instruction set for a microcontroller with a data memory divided into a plurality of memory banks wherein the data memory has more than one memory bank of the plurality of memory banks that form a block of linear data memory to which no special function registers are mapped, a bank select register which is not mapped to the data memory for selecting a memory bank, and with an indirect access register mapped to at least one memory bank, wherein the instruction set includes a plurality of instructions operable to directly address all memory locations within a selected bank, at least one instruction that provides access to the bank select register, and at least one instruction performing an indirect address to the data memory using the indirect access register.

Description

[0001] Cross References to Related Applications [0002] This application claims that the title of the application filed on February 11, 2009 is "Linear Memory in a Banked RISC Microcontroller, and RISC MCU with Banked Memory and Specialized Banking Instructions (LINEAR MEMORY IN A BANKED RISC MICROCONTROLLER, AND RISC MCU WITH BANKED MEMORY AND SPECIALIZED BANKING INSTRUCTIONS), U.S. Provisional Application No. 61 / 151,754, which is hereby incorporated in its entirety. technical field [0003] The present invention relates to integrated microcontrollers, and more particularly to memory access for microcontrollers. Background technique [0004] A linearly accessible data memory space requires a large number of memory bytes (eg, random access memory (RAM) bytes) to be contiguously placed and addressable in the address space. A linear memory can thus be fully addressed via addresses whose length depends on the size of the RAM. Microcontrollers with long instructions (eg, 32-...

Claims

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Application Information

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IPC IPC(8): G06F9/30
CPCG06F9/3012G06F9/342G06F9/30145G06F9/30167G06F9/30181G06F12/0623G06F9/35G06F9/30098G06F9/30101G06F9/30G06F12/06G06F13/16
Inventor 齐克·R·伦德斯特鲁姆维维安·德尔波特肖恩·斯蒂德曼约瑟夫·朱利谢
Owner MICROCHIP TECH INC
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