Dynamic allocation method for instruction memory cell for multi-core heterogeneous system

An instruction storage, heterogeneous system technology, applied in memory systems, program control design, instruments, etc., can solve problems such as insufficient loading

Inactive Publication Date: 2012-07-11
SHANGHAI UNIV
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Problems solved by technology

However, because MV11 uses ARM9 as the core processor, it has relatively strong functions and can run the operating system, so its program complexity can be large or small, and the fixed space may not be enough to install a complex program.

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  • Dynamic allocation method for instruction memory cell for multi-core heterogeneous system
  • Dynamic allocation method for instruction memory cell for multi-core heterogeneous system
  • Dynamic allocation method for instruction memory cell for multi-core heterogeneous system

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Embodiment Construction

[0047] A preferred embodiment of the present invention is described in detail as follows in conjunction with accompanying drawing:

[0048] The method for dynamically allocating instruction storage units of this multi-core heterogeneous system, configures a special function register through the programming of the main control processor of the system, so that an offset address is added to the instruction addressing of the non-master control processor, and adopts the following workflow (see figure 1 ) to realize the dynamic allocation of multi-core heterogeneous system instruction storage units:

[0049] 1. In the MV12 system, the ARM processor is responsible for the program memory configuration (mapping), and the MV10_2 follows the hardware configuration (mapping).

[0050] 2. MV12 is unified addressing for MV10_2 MCU, MV10_1 MCU and other modules.

[0051] 3. MV11 programming (you can choose whether to remap the instruction memory unit of MV10_2 at the beginning of ...

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Abstract

The invention relates to a dynamic allocation method for an instruction memory cell for a multi-core heterogeneous system, which includes the steps: setting a special function register on hardware of the multi-core heterogeneous system, enabling the special function register to dynamically allocate the shared instruction memory cell for the multi-core heterogeneous system by means of software programming, and enabling an instruction memory cell occupied by each processor to be adjusted according to the size of application programs at the start of operation of the system. The method can be applied to an MV12 multi-core heterogeneous system, and can be also applied to the field of the multi-core heterogeneous system comprising 8051 series microprocessors.

Description

technical field [0001] The invention relates to a method for dynamically allocating instruction storage units of a multi-core heterogeneous system. The object is mainly aimed at multi-processors of the multi-core heterogeneous system sharing the same instruction storage unit (code memory). Now it is applied to the MV12 multi-core heterogeneous system. It can also be applied to other similar multi-core heterogeneous systems. Background technique [0002] The dynamic allocation method of multi-core heterogeneous system storage unit is proposed to solve the allocation of MV12 multi-core heterogeneous system instruction storage unit. The MV12 multi-core heterogeneous system developed by our research group is composed of a 32-bit wide MV11 processor and two 8-bit wide MV10 processors. MV11 is a microprocessor obtained by the research group with ARM9 as the core and expanded memory management unit (MEMC, memory controller) and other modules. MV11 has passed the tape-out verifica...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/34
Inventor 胡越黎黄俊凉孙斌周俊刘廷尧虞超王龙杰
Owner SHANGHAI UNIV
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