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Layout structure for optimizing area of liquid crystal on silicon microdisplay pixel unit

A technology of pixel unit and liquid crystal on silicon, which is used in electrical components, instruments, semiconductor devices, etc., can solve the problems of increasing the area and wiring complexity of pixel units, and achieves optimized layout, pixel circuit area and signal line wiring optimization. , the effect of reducing the layout area

Active Publication Date: 2013-06-12
南京微芯华谱信息科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the field buffer pixel circuit needs to increase the discharge path and charge path for the pixel capacitance, it will increase the area of ​​the pixel unit and the complexity of the wiring, and the higher the display resolution, the higher the requirement for the area of ​​the pixel unit, so a reasonable layout is required LCoS pixel unit circuit layout

Method used

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  • Layout structure for optimizing area of liquid crystal on silicon microdisplay pixel unit
  • Layout structure for optimizing area of liquid crystal on silicon microdisplay pixel unit
  • Layout structure for optimizing area of liquid crystal on silicon microdisplay pixel unit

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Embodiment Construction

[0020] The invention provides a layout structure for optimizing the area of ​​liquid crystal on silicon (LCoS) micro-display pixel unit, the layout mainly includes the first layer of metal lines MET1, the second layer of metal lines MET2, the third layer of metal lines MET3, polysilicon POLY1, contact holes CT, a first through hole V1, a second through hole V2; the pixel unit circuit includes a first transistor M1, a second transistor M2, a third transistor M3, a storage capacitor C1 and a pixel capacitor C2.

[0021] The source M1_S of the first transistor M1 is connected to the second layer metal line MET2 through the first layer metal line MET1 and the first through hole V1, and then the second layer metal line MET2 is connected to the third layer metal line through the second through hole V2. Line MET3, the third layer metal line MET3 is the data input signal wiring VDATA_MET3; the gate M1_G of the first transistor M1 connects the first layer of polysilicon POLY1 to the fir...

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Abstract

The invention discloses a layout structure for optimizing the area of a liquid crystal on silicon microdisplay pixel unit. The pixel unit comprises a first transistor, a second transistor, a third transistor, a storage capacitor and a pixel capacitor; the first transistor, the second transistor and the third transistor are arranged at the upper part of the pixel unit, and the storage capacitor and the pixel capacitor are arranged at the lower part of the pixel unit. The layout structure for optimizing the liquid crystal (LCoS) microdisplay pixel unit in the invention is used for reasonably laying out the position of each transistor of a circuit in the pixel unit and repeatedly utilizing part of a layout by using the connecting relationship between the capacitors, so that the layout area is reduced, and pixel circuit area and signal ling wiring are optimized.

Description

technical field [0001] The invention relates to a liquid crystal on silicon (LCoS), in particular to a layout structure for optimizing the pixel unit area of ​​a liquid crystal on silicon micro-display. Background technique [0002] LCoS is a new display technology that combines CMOS integrated circuit technology and liquid crystal display technology. Compared with transmissive liquid crystal display (LCD) and digital light processing (DLP), LCoS has the characteristics of high light utilization efficiency, small size, high aperture ratio, and low manufacturing cost. The resolution of LCoS can be made very high, and it can be easily applied to portable projection equipment. [0003] At present, the mainstream method for realizing color display of liquid crystal on silicon microdisplay is sequential color method, which mainly divides a frame of image into three sub-frames of red, green and blue, which will reduce the lighting time of the light source, and the field buff...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G02F1/1362G02F1/1368H01L27/02
Inventor 赵博华黄苒杜寰罗家俊林斌
Owner 南京微芯华谱信息科技有限公司