Serial communication system between devices and method

Abstract

The invention discloses a serial communication system between devices and a method. The serial communication system between the devices comprises a master device, at least one slave device and an SPI (serial peripheral interface) bus for communication between the master device and the slave device. The SPI bus comprises a master-out slave-in signal line MOSI, a master-in slave-out signal line MISO, a clock signal line SCK, a chip selection signal line CS, a master transmission request and transmission completion signal line AP_RTS, a master reception preparation and completion signal line AP_RDY, a slave transmission request and transmission completion signal line BP_RTS, a slave reception preparation and completion signal line BP_RDY, a signal line AP_SLEEP for a master to awaken up a slave or control the slave to sleep, a slave sleeping state signal line BP_SLEEP and a slave abnormality state signal line BP_ERR. By adopting the system and the method, the transmission speed is high, and the cost of implementation is low. In addition, the system also has the functions of awakening up the sleep state and processing abnormalities, the failure in data communication in the sleep state of the slave device can be controlled promptly, the power consumption can be reduced, and the real-time monitoring of abnormal working states of the slave device can be achieved.

Description

technical field [0001] The invention relates to the communication field, in particular to a serial communication system and method between devices. Background technique [0002] Various peripheral chips or modules are used in electronic products, some of which require high-speed data communication with the main device, such as network modules and data acquisition modules. The SPI bus is an inter-chip serial communication bus suitable for this situation, which provides two data pins, a clock pin and a chip select pin. However, in order to have wide applicability, the basic SPI bus function is relatively limited, and the data transmission must be initiated by the SPI master device, and then query the status of the slave device or transmit data. When the peripheral module needs to actively and quickly exchange data with the master device, the basic SPI bus cannot meet the requirements of this fast response and high-speed transmission. Contents of the invention [0003] In v...

AI Technical Summary

Problems solved by technology

However, in order to have wide applicability, the basic SPI bus function is relatively limited, and the data transmission must be initiated by the SPI master device, and then query the status of the slave device or transmit data

When the peripheral module needs to actively and quickly exchange data with the master device, the basic SPI bus cannot meet the requirements of this fast response and high-speed transmission

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