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Method for forming storage device

A storage device and control gate technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem of low yield of storage cells and achieve the effect of avoiding collapse

Active Publication Date: 2014-01-08
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology

[0005] Many methods for forming memory cells are disclosed in the prior art, for example, the Chinese patent application with application number "200610129199.3" discloses a split-gate memory cell and its formation method. The inventors have found that the yield rate of memory cells formed by the method is not tall

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Embodiment Construction

[0046] As mentioned above, the inventor found that the yield rate of the memory formed by the above-mentioned prior art is not high, and after research, it was found that it was caused by the collapse of the stacked gate 20; The middle stack gate 20 is prone to collapse. Based on these researches, the inventors have found that, during the process of ion implantation to the semiconductor substrate 10 to form the source region 16 using the photoresist layer 15 and the sidewall 14 as a mask, the top of the photoresist layer 15 is covered by the ion implantation. Carbonization forms hardened layer 151 (referring to Figure 1g ), remove the hardened layer 151 and the photoresist layer 15 by ashing, because the photoresist layer 15 needs to be ashed at a high temperature above 250° C. during ashing, but due to the existence of the hardened layer 151, the ashing at high temperature When removing the photoresist layer 15 and the hardened layer 151, the stacked gate 20 formed by stack...

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Abstract

The invention discloses a method for forming a storage device, which comprises the steps of: providing a semiconductor substrate; forming a floating gate and a control gate on the semiconductor substrate, wherein the control gate is stacked on the floating gate; forming lateral walls on two sides of the floating gate and the control gate; forming a photoetching glue layer on the substrate at one sides of the floating gate and the control gate, wherein the photoetching glue layer covers the lateral wall at the same side as the photoetching glue layer and covers partial or all control gate; carrying out ion implantation on the semiconductor substrate with the photoetching glue layer and the lateral walls as masks to form a source region, wherein the source region is positioned in the substrate at the other side of the floating gate and the control gate, wherein in the ion implantation process, the upper layer of the photoetching glue layer is carbonized into a hardening layer; removing partial or all hardening layer; removing the photoetching glue layer and the lateral walls; and forming an erasing gate, wherein the erasing gate is positioned on the source region. Because the hardening layer is completely or partially removed, the control gate and the floating gate can be avoided being collapsed in the prior art.

Description

technical field [0001] The invention relates to a method for forming a semiconductor device, in particular to a method for forming a memory device. Background technique [0002] In the current semiconductor industry, integrated circuit products can be mainly divided into three types: analog circuits, digital circuits and digital / analog hybrid circuits, among which storage devices are an important type of digital circuits. Among storage devices, the development of flash memory (flash memory for short) is particularly rapid in recent years. The main feature of flash memory is that it can keep stored information for a long time without power on; and it has the advantages of high integration, fast access speed, easy erasing and rewriting, etc., so it has been widely used in many fields such as microcomputer and automatic control. a wide range of applications. [0003] The split-gate memory in flash memory has many advantages, such as avoiding over-erasing problems caused by le...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8247
Inventor 周儒领张庆勇
Owner SEMICON MFG INT (SHANGHAI) CORP