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Solid-state imaging element and camera system

A technology of solid-state imaging elements and pixel units, which is applied in the field of camera systems and can solve problems such as increased power consumption

Active Publication Date: 2012-03-21
SONY CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0037] When additional high-speed readout operations are required, it may be considered to increase the current flowing into the amplifying circuit 7, for example, by changing the bias voltage Vb applied to the gate of the bias transistor 9, however, the increase in current causes proportional power consumption increase

Method used

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  • Solid-state imaging element and camera system
  • Solid-state imaging element and camera system
  • Solid-state imaging element and camera system

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Experimental program
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no. 1 approach

[0070] 4. Second Embodiment

no. 6 approach

[0075] 9. Seventh Embodiment

[0076] 10. Eighth Embodiment

[0077] 11. Ninth Embodiment

[0078] 12. Tenth Embodiment (Arrangement Example of Camera System)

[0079]

[0080] Image 6 It is a diagram showing an arrangement example of a CMOS image sensor (solid-state imaging element) according to an embodiment of the present invention.

[0081] The CMOS image sensor 100 includes a pixel array section 110 , a row selection circuit (Vdec) 120 as a pixel driving unit, and a readout circuit (AFE) 130 .

[0082] In the present embodiment, for example, the side opposite to the side on which transistors are arranged (=back surface) is set as a light irradiation side, and a plurality of semiconductor layers are stacked and formed to read out output signals of pixels.

[0083] The characteristic configuration corresponding to the stacked structure of the semiconductor layers will be described later.

[0084] The pixel array section 110 has a plurality of pixel units 110A arrang...

no. 2 approach

[0163] Figure 10 It is a diagram showing an example of main circuits of the CMOS image sensor (solid-state imaging element) according to the second embodiment.

[0164] The CMOS image sensor 100B according to the second embodiment is different from the CMOS image sensor 100A according to the first embodiment in that the number of branches of the output signal line 116 at the separation section 140B is not two but two or more (here, three). branches).

[0165] In the CMOS image sensor 100B, the output signal line 116 is divided into three output signal lines 116-1, 116-2, 116-3.

[0166] In addition, the amplification circuits 117 of the pixel units 110A- 5 and 110A- 6 are connected to the output signal line 116 - 3 .

[0167] Switch 141B not only includes Figure 9 The configuration also includes a pair of terminals e, f.

[0168] In addition, the terminal e is connected to the stack connection terminal 118, and the terminal f is connected to the output signal line 116-3....

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Abstract

The invention relates to a solid-state imaging element and a camera system including same. The solid-state imaging element includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line. According to the invention, it is possible to realize speed-up in driving the output signal line in a pixel in a stacking structure and low power consumption.

Description

[0001] Cross References to Related Applications [0002] This application contains subject matter related to and claims priority from Japanese Patent Application JP2010-197734 filed in the Japan Patent Office on Sep. 3, 2010, the entire content of which is hereby incorporated by reference. technical field [0003] The present invention relates to a solid-state imaging element typified by a CMOS image sensor and a camera system. Background technique [0004] A solid-state imaging element configured to include: a photoelectric conversion unit; a charge-to-voltage conversion unit that converts accumulated charges into a voltage; and a unit pixel having an amplification circuit for reading out a voltage of the charge-to-voltage conversion unit. [0005] There has been proposed a technique for such a solid-state imaging element in which the side (= back) opposite to the side where the transistors are arranged is set as the light irradiation side, and a plurality of semiconductor ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N5/374H04N5/378H01L27/146H04N25/00
CPCH01L27/14641H04N5/37457H04N5/3742H01L27/14634H01L27/14636H01L27/1464H04N25/767H04N25/778H04N25/40H04N25/772H04N25/78H04N23/95H01L27/14612H01L27/14643H04N25/766H04N25/79H04N25/77H01L27/148H04N23/54H04N25/75H04N25/709
Inventor 大池祐辅
Owner SONY CORP