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Vector-processor-oriented mean-residual normalized product correlation vectoring method

A technology of a vector processor and an implementation method, which is applied in the field of vectorized implementation of de-averaged normalized product correlation coefficients, and can solve the problems that the vector processor does not support data reading across word boundaries, and the calculation results are difficult.

Active Publication Date: 2013-03-27
NAT UNIV OF DEFENSE TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But for a vector processor, on the one hand, the vector processor contains multiple processor units, and it is difficult to reuse the previous calculation results. On the other hand, the sub-image pixel data usually uses 8-bit pixel values, and it needs to be byte-by-byte when traversing the reference image. Read image data with an offset, and vector processors generally do not support data reading across word boundaries
At present, there is a lack of effective vectorization implementation methods for vector processor-oriented normalized normalized product correlation coefficients

Method used

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Embodiment Construction

[0040] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

[0041] Such as figure 1 As shown, the vectorized implementation method of the vector processor-oriented normalized product correlation coefficient of the present invention comprises the following steps:

[0042] 1. Assume that the reference map A has a size of MxN, the real-time map is B, and its size is mxn, and M>m, N>n; the vector processor includes P processing units;

[0043] 2. The vector processor first traverses the real-time graph B and reads the data of the real-time graph B into the vector register, uses the SIMD-based vector dot product operation to sum the values ​​in the processing unit, and calculates the values ​​between the processing units based on the reduction operation and, calculate the mean value of the pixel values ​​in the real-time image B respectively and pixel value squared B ij 2 cumulative sum of

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Abstract

The invention discloses a vector-processor-oriented mean-residual normalized product correlation vectoring method. The method comprises the following steps of: setting a reference graph A and a real-time graph B; traversing the real-time graph B and calculating a mean value of pixel values in the real-time graph B and an accumulated sum of pixel value squares Bij2 respectively; traversing the reference graph A and taking two sub graphs Auv and A(u+4)v from the reference graph A each time, and shuffling to obtain four sub graphs A(u+k)v (k=0, 1, 2 and 3); sequentially calculating the accumulated sum of the pixel values, the accumulated sum of (A(u+k)v)ij2 and the accumulated sum of (A(u+k)v)ij*Bij; sequentially calculating the mean-residual normalized product correlation coefficients of the sub graphs A(u+k)v (k=0, 1, 2 and 3) with the real-time graph B; and setting u to be u+4, repeating the steps until the reference graph A is traversed completely so as to acquire all the mean-residual normalized product correlation coefficient values.

Description

technical field [0001] The invention relates to the field of image matching and vectorized compilation thereof, in particular to a vectorized realization method of mean-removed normalized product correlation coefficients. Background technique [0002] With the increasingly high computing requirements of computing-intensive applications such as 4G wireless communication, radar signal processing, high-definition video and digital image processing, it is difficult for a single chip to meet the application requirements. Multi-core processors, especially vector processors, have been widely used application. Vector processors generally consist of multiple processor elements (PEs) and typically support vector-based data loads and stores. Each PE contains multiple independent functional units, generally including shift units, ALU units, multiplication units, etc. Vector processors usually support SIMD (Single Instruction / Multiple Data) operations, that is, under the control of the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T1/20G06T7/00G06F9/38
Inventor 刘仲陈书明陈跃跃刘衡竹陈海燕龚国辉万江华彭元喜扈啸孙书为
Owner NAT UNIV OF DEFENSE TECH
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