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Interface circuit

An interface circuit and control circuit technology, applied in the direction of logic circuit coupling device, programmable logic circuit device, logic circuit connection/interface layout, etc. problem, to achieve good signal transmission characteristics and ensure the effect of signal transmission characteristics

Inactive Publication Date: 2012-05-09
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the accuracy of the voltage comparison performed by the comparator is not guaranteed, so it is not always possible to correct the resistance value of the terminating resistor to the desired resistance value, and there is a problem that the signal transfer characteristic is degraded.

Method used

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Examples

Experimental program
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Effect test

Embodiment approach 1

[0028] figure 1 It is a circuit diagram schematically showing the configuration of the interface circuit according to the first embodiment. figure 1The illustrated interface circuit 100 includes a transmitter circuit (transmitter circuit) 102, a receiver circuit (receiver circuit) 103, a transmission pad 106 connected to the data bus, and a reception pad 107 connected to the data bus. Between the transmitter circuit 102 and the transmission pad 106 and between the receiver circuit 103 and the reception pad 107 , variable resistors 104A and 104B functioning as active termination resistors of the bus are respectively provided. Furthermore, the interface circuit 100 includes a correction circuit 101 (201, 301) for correcting active termination resistance. The correction circuit 101 ( 201 , 301 ) is connected to an external reference resistor Rterm via a pad 105 . Then, after the calibration operation is performed, the resistance values ​​of the variable resistance units 104A an...

Embodiment approach 2

[0064] The structure of the interface circuit according to Embodiment 2 is different from that shown in Embodiment 1. figure 1 It is the same, and its detailed description is omitted here.

[0065] Figure 5 It is a circuit diagram showing the configuration of the correction circuit 201 according to this embodiment. exist Figure 5 in, right with image 3 Common constituents endowed with image 3 The same symbols are used, and their detailed descriptions are omitted here. exist Figure 5 Among them, 260 is a DA converter for offset correction of the comparator 130 , and 250 is an adder for adding the output of the DA converter 260 to the (+) input of the comparator 130 . The control circuit 240 outputs the offset correction signal OFFCAN supplied to the DA converter 260 in addition to the first and second variable resistor control signals UPCODE, DNCODE, and the selector control signal INSEL. The DA converter 260 converts the offset correction signal OFFCAN into an anal...

Embodiment approach 3

[0090] The structure of the interface circuit according to Embodiment 3 is the same as that shown in Embodiment 1. figure 1 It is the same, and its detailed description is omitted here.

[0091] Figure 6 It is a circuit diagram showing the configuration of the correction circuit 301 according to this embodiment. exist Figure 6 in, right with image 3 Common constituents endowed with image 3 The same symbols are used, and their detailed descriptions are omitted here. exist Figure 6 Among them, 380 is a temperature detection unit, and 370 is a temperature correction table. The temperature detection unit 380 includes a temperature-voltage conversion element 381 and comparators 331 and 332 for comparing the output of the temperature-voltage conversion element 381 with mutually different temperature detection reference voltages VREFH and VREFL. Comparators 331 and 332 constitute a comparison unit for temperature detection. Reference voltage VREFH is a voltage level for ...

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PUM

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Abstract

In a calibration circuit (101) of an interface circuit, a control circuit (140) controls a selector (120) so that voltages (V1, VREF) or voltages (V1, V2) are provided to a comparator (130) when executing calibration. The voltages can be switched between the inverting or non-inverting inputs of the comparator (120). Further, in each of these states, the control circuit (140) finds the signal value of the variable resistance control signal (UPCODE, DNCODE) when the output of the comparator (120) has changed, and uses the average value of the signal values that were found to find the calibration data for controlling the resistance value of the termination resistance.

Description

technical field [0001] The present invention relates to an interface circuit such as a memory interface, and particularly relates to a technique for correcting a resistance value of a terminal resistor used for a bus terminal. Background technique [0002] Generally, in an interface circuit, SSTL (stub bus terminated logic) and active termination (active termination) are used for bus termination. The active termination is also called on-chip termination, and the bus is terminated by using an active termination resistor (hereinafter referred to as “termination resistor”) inside the chip. Compared with SSTL, the active terminal has better signal transmission characteristics and a higher data transmission rate. [0003] In the active termination, variation in the resistance value of the termination resistor causes degradation of signal transfer characteristics. In addition, as data transmission speeds up, the effect of variation in the resistance value of the terminating resi...

Claims

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Application Information

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IPC IPC(8): H04L25/02G06F3/00H03K19/0175
CPCH04L25/0278H03K19/017581H03K19/017545
Inventor 平木刚宫嵜慎也田町亘中平圭亮波户冈和也池村次朗
Owner PANASONIC CORP
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