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Low-cost data transmission device for program counter

A technology of data transmission device and program counter, applied in machine execution device, concurrent instruction execution and other directions, can solve problems such as obvious hardware consumption, and achieve the effect of reducing hardware cost

Inactive Publication Date: 2012-06-20
C SKY MICROSYST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The branch prediction is generally performed in the fetching stage, and the prediction information can only be used in the instruction execution stage. During this period, the information will pass through the registers between the fetching stage and the decoding stage, between the decoding stage and the execution stage, and some Instruction cache device, hardware consumption is obvious

Method used

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  • Low-cost data transmission device for program counter
  • Low-cost data transmission device for program counter

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Embodiment Construction

[0020] The present invention will be further described below in conjunction with the accompanying drawings.

[0021] refer to figure 1 , a low-cost program counter data transmission device, including: an instruction prefetching unit, which is used to prefetch instructions; a predecoding unit, which is used to predecode the fetched instructions, decode branch instructions, and communicate with the program counter Related instructions; the branch prediction unit is used to perform branch prediction on the branch instruction and generate the predicted target program counter; the branch instruction processing unit is used to be responsible for the execution of the branch instruction and the instructions related to the program counter, and read the data of the program counter cache unit Fetch and perform row calculation; the instruction prefetching unit, pre-decoding unit, branch prediction unit and branch instruction processing unit sequentially adopt pipeline processing; the prog...

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Abstract

The invention discloses a low-cost data transmission device for a program counter. An instruction prefetching unit, a predecoding unit, a branch prediction unit and a branch instruction processing unit sequentially form a processing pipeline. The data transmission device further comprises a program counter cache unit and a program counter instruction processing unit. The program counter instruction processing unit is used for transmitting the program counter information of a program counter related instruction to an input port of the program counter cache unit. The branch prediction unit generates a prediction target instruction program counter, and transmits the prediction target instruction program counter and a current instruction program counter to the program counter cache unit. When a branch instruction and the program counter related instruction are executed by the branch instruction processing unit, the program counter information is read from an output port of the program counter cache unit. By the low-cost data transmission device for the program counter, hardware cost in the transmission process of the program counter can be effectively decreased.

Description

technical field [0001] The present invention relates to a low-cost program counter data transmission device. By caching the current program counter of the branch instruction and the predicted target program counter, the current program counter of the instruction related to the program counter is not transmitted with the pipeline register, thereby reducing the hardware overhead. , suitable for processors with multi-stage pipeline structure. Background technique [0002] The program counter is used to store the address of the memory unit where the next instruction is located to ensure that the program can be executed continuously. Before the program starts to execute, its starting address, that is, the address of the memory unit where an instruction of the program is located, is sent to the program counter, so the content of the program counter is the address of the first instruction fetched from the memory. When executing instructions, the processor will automatically modify...

Claims

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Application Information

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IPC IPC(8): G06F9/38
Inventor 孟建熠沈秀红李春强丁永林
Owner C SKY MICROSYST CO LTD
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