Method for testing dual inline memory modules (DIMM)

A chip and logic interface technology, applied in the testing field of testing efficiency, can solve the problems of slow testing speed of special testing software, limited number of DIMM slots, high price of server motherboards, etc. fast effect

Active Publication Date: 2013-08-14
烟台浪潮云计算有限公司
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Problems solved by technology

Due to the fact that general computer motherboards do not support RDIMM, the price of server motherboards is high, and the number of DIMM slots on the motherboard is limited, and the test speed of special test software is slow
This brings inconvenience to the development of new products of DIMM

Method used

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  • Method for testing dual inline memory modules (DIMM)
  • Method for testing dual inline memory modules (DIMM)

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Embodiment Construction

[0017] A method for implementing DIMM testing provided by the present invention will be described in detail below in conjunction with the accompanying drawings.

[0018] In order to improve the efficiency of DIMM testing, realize high-speed reading and writing. as attached figure 1 As shown, a method for implementing DIMM testing is now provided, and its specific implementation steps are:

[0019] First, the field programmable gate array FPGA chip is connected to the control chip, high-speed interface and DIMM logic interface of multiple channels, and the DIMM verification system is composed of FPGA chip, control chip, high-speed interface and DIMM logic interface. The verification system forms an electronic disk; then sends the read and write instructions of the master device to the system through the high-speed interface; finally, the control chip is responsible for the instruction analysis and reads and writes the DIMM to be tested by controlling the DIMM logic to realize ...

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Abstract

The invention provides a method for testing dual inline memory modules (DIMM). The method comprises the following steps of: connecting a field programmable gate array (FPGA) chip with a control chip, a high-speed interface and DIMM logic interfaces of a plurality of channels, wherein a DIMM verification system consists of the FPGA chip, the control chip, the high-speed interface and the DIMM logic interfaces, and an electronic disk is formed in the verification system; sending a read-write instruction of a master equipment end to the system by virtue of the high-speed interface; and resolvingthe instruction by the control chip, and reading and writing the DIMM to be tested by controlling a DIMM logic so as to implement the DIMM test. Compared with the prior art, the method for testing the DIMM is high in test speed, high in test efficiency, high in read-write speed and high in popularization and use value.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a testing method for improving the testing efficiency of DIMMs. Background technique [0002] DIMM (Dual Inline Memory Modules, Dual Inline Memory Module), which is commonly referred to as a memory module. It is specifically divided into UDIMM (Unbuffered DIMM, unbuffered dual in-line memory module, usually used in ordinary commercial / home hosts) and RDIMM (Registered DIMM, register dual in-line memory module, usually used in servers). [0003] The usual memory test is through the computer motherboard, using special software for reading and writing tests. Due to the fact that general computer motherboards do not support RDIMM, the price of server motherboards is high, and the number of DIMM slots on the motherboard is limited, and the test speed of special test software is relatively slow. This brings inconvenience to the development of new products of DIMM. Contents...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/22
Inventor 姜凯于治楼沈忱
Owner 烟台浪潮云计算有限公司
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