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Error correction device and method for multi-channel flash memory controller and multi-channel flash memory controller

A technology of a flash memory controller and an error correction device, applied in the field of data processing, can solve the problems of high cost and waste of resources, and achieve the effect of saving costs and resources

Active Publication Date: 2015-09-30
NETAK TECH KO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is to provide an error correction method for a multi-channel flash memory controller, which is used to solve the error correction method in the prior art because each channel independently occupies an error correction module, which makes the cost extremely expensive and wastes a lot of resource problem

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  • Error correction device and method for multi-channel flash memory controller and multi-channel flash memory controller
  • Error correction device and method for multi-channel flash memory controller and multi-channel flash memory controller
  • Error correction device and method for multi-channel flash memory controller and multi-channel flash memory controller

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Embodiment Construction

[0037] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0038] For the BCH algorithm in the error correction method, the implementation process includes: encoding and generating Parity check code (writing NAND Flash synchronously), generating adjoint Syndrome (reading NAND Flash synchronously), calculating the error position polynomial, and money search to find out wrong location.

[0039] For the RS algorithm in the error correction method, its implementation process includes: encoding and generating Parity check code (writing NAND Flash synchronously), generating adjoint Syndrome (reading NAND Flash synchronously), calculating error position polynomial and error value polynomial, Money search finds the error location, and the Forney algorithm calculates the error value.

[0040] It ...

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Abstract

The invention provides an error correction device and method of a multichannel flash memory controller and a multichannel flash memory controller. The error correction device comprises a coding / decoding module and an error calculating module, wherein the coding / decoding module specifically comprises a combined logic circuit and a plurality of time sequence logic circuits which correspond to a plurality of channels; the coding / decoding module further comprises a multiple selector for selecting data and time sequence logic register information of a corresponding effective channel into the combined logic circuit according to the data effectiveness of each channel at a current period, and an input module for inputting an operation result of the combined logic circuit into a time sequence logic register of the corresponding effective channel. Due to the adoption of the error correction device, error correction method and multichannel flash memory controller disclosed by the embodiment of the invention, the problems of extremely high cost and waste of a large quantity of resources caused by independent occupation of an error correction module by each channel in an error correction method in the prior art.

Description

technical field [0001] The invention relates to the field of data processing, in particular to an error correction device and method for a multi-channel flash memory controller and the multi-channel flash memory controller. Background technique [0002] As the process size of flash memory production continues to decrease, and the information stored in a single storage unit continues to increase, the probability of errors in flash memory is also increasing, and the error correction capability of the error correction module needs to be continuously improved. Storage cells can be divided into two types: SLC (Single Level Cell, single-level cell) and MLC (Multi-Level Cell, multi-level cell). SLC requires every 256 bytes (Byte) to correct 1 bit (bit) error, MLC requires every 512Byte to correct 4-8bit errors, and now the latest flash memory requires at least every 1024Byte to correct 24bit, or even 72bit. The error correction module includes a codec module and a calculation erro...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/42G11C7/10
Inventor 程学敏
Owner NETAK TECH KO LTD