Data error-detecting method for EEPROM chip
A chip and data technology, applied in the field of data error detection, can solve the problems of multiple redundant spaces and low utilization of EEPROM space, and achieve the effects of reducing the number of redundant, balanced writing times, and increasing processing time
Active Publication Date: 2014-07-30
大连现代高技术集团有限公司
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Problems solved by technology
This method does not need to record the number of times data is written, but because data needs to be stored repeatedly, more redundant space is required, and the space utilization rate of EEPROM is low
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[0014] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.
[0015] The data error detection method of the EEPROM chip includes the operation of writing data into the EEPROM chip and the operation of reading data from the EEPROM chip. Such as figure 1 As shown, the operation of writing data into the EEPROM chip includes:
[0016] Step 1: Write the first flag bit into the address space following the address space where the first valid data is to be written.
[0017] Step 2: Write the first valid data into the address space to be written.
[0018] Step 3: Write the second flag bit into the address space next to the address space where the first flag bit is located.
[0019] Step 4: Write the second valid data into the address space where the first flag is located, and repeat steps 1 to 4 until all valid dat...
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The invention discloses a data error-detecting method for an EEPROM (Electrically Erasable Programmable Read Only Memory) chip, which is characterized by comprising the following steps: writing data in the EEPROM chip and reading data from the EEPROM chip; the operation of writing the data into the EEPROM chip comprises the following steps: firstly, a first flag bit is written into an address space behind the address space where first effective data is to be written into; secondly, the first effective data is written into the to-be-written address space; thirdly, a second flag bit is written into an address space behind the address space where the first flag bit is positioned; fourthly, second effective data is written into the address space where the first flag bit is positioned, and the steps from the first to the fourth are repeated until all the effective data is written into the EEPROM chip. According to the method provided by the invention, the written number of each unit of the EEPROM chip is balanced, so the redundant number of the memory unit is reduced; and the storage data validity judgment is only performed when the system is electrified and initialized, so the processing time of the system service process is not increased.
Description
technical field [0001] The invention belongs to the field of data storage, in particular to a data error detection method of an EEPROM chip. Background technique [0002] Commonly used EEPROM chips generally have a clear upper limit for erasing and writing. In actual use, if the length of data to be stored is short and frequent erasing is required (such as storing serial number or address information, etc.), using a fixed address storage method will easily lead to The address unit of the fixed storage part of the chip first reaches the maximum number of erases and writes and is damaged and loses data, and the entire chip needs to be replaced. [0003] The current solution is to store the above data in an indexed manner. One indexing method is to record the number of times data is written, and replace the storage space before reaching the maximum number of times declared by the manufacturer. This method needs to save the number of times of writing data. This number of times...
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IPC IPC(8): G11C29/52
Inventor 朱旭韩雪孙涛许明
Owner 大连现代高技术集团有限公司