BCH (Broadcast Channel) encoder and decoder

Abstract

The invention is suitable for the technical field of communication and provides a BCH (Broadcast Channel) encoder. The BCH encoder is provided with a code word input end and an encoding calculation unit, wherein the encoding calculation unit comprises at least two complementation circuits used for encoding calculation of the code words, the input end of a first complementation circuit is connected with the code word input end through a first switch, and the input end of a second complementation circuit is also connected with the code word input end through a second switch. The invention provides a BCH decoder correspondingly, and the BCH decoder also comprises at least two complementation circuits used for decoding calculation. Therefore, the encoder and the decoder have double error correcting capabilities, by properly enlarging the verifying data space of BCH codes, the delaying is lowered, and the error correcting property is improved.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to a BCH encoder and decoder. Background technique [0002] The error correction technology currently applied to solid-state hard disks is mainly BCH, and the encoding process is realized by calculating the remainder of the division circuit. The decoding process is divided into three parts, the first is the remainder, which is realized by using a linear feedback shift register on the hardware, then the calculation of the adjoint formula, the solution of the key equation, and finally the money search process. When designing a BCH code for error correction coding, it is usually considered that the area used by the error correction codec unit should be as small as possible, and the delay (latency) should be as short as possible. It should be as high as possible. However, some of these requirements conflict with each other in practical applications. The current BCH codec...

AI Technical Summary

Problems solved by technology

When designing a BCH code for error correction coding, it is usually considered that the area used by the error correction codec unit should be as small as possible, and the delay (latency) should be as short as possible. It should be as high as possible. However, some of these requirements conflict with each other in practical applications. The current BCH codec error correction is to improve the error correction capability by simply increasing the check data or increasing the code length. At the same time , but sacrifices data space or hysteresis

[0003] In summary, the existing BCH encoder and decoder obviously have inconvenience and defects in actual use, so it is necessary to improve

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