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Isolation circuit of inter-integrated circuit (I2C) bus and I2C bus system

A technology for isolating circuits and bus systems, applied in the field of communications, can solve problems such as high cost and complex circuit structure, and achieve the effect of low cost and simple circuit structure

Active Publication Date: 2012-08-08
HUAWEI DIGITAL POWER TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

As a result, the structure of the existing circuit is complex and the cost is high

Method used

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Embodiment Construction

[0048] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0049] In view of this, the object of the present invention is to provide an I2C bus isolation circuit and an I2C bus system, which can realize voltage matching between devices and the I2C bus, and support hot swapping of devices, and the circuit has a simple structure and low cost.

[0050] The I2C bus isolation circuit described in Embodiment 1 of the present invention is used for: adopting a master-multiple-slave architecture on the I2C bus, when the power supply voltage of the master node equipment chip does not match the I2C bus level, the isolation circuit realizes the Voltage matching between chip and I2C bus.

[0051] refer to figure 2 , is a structural diagram of the I2C bus system in Embodiment 1 of the present inventi...

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Abstract

The embodiment of the invention discloses an isolation circuit of an inter-integrated circuit (I2C) bus. Master node equipment in an I2C bus system is hung on the I2C bus through the isolation circuit, wherein the isolation circuit adopts a triode design; after clock signals or data signals sent out by the master node equipment are negated, triodes are driven, and electrical levels of the clock signals or the data signals are pulled up to a supply voltage of the I2C bus by pull-up resistors of collectors of the triodes; and after data signals received from the I2C bus are negated, the triodes are driven, and the electrical levels of the data signals are pulled up to a working voltage of a chip of the master node equipment by pull-up resistors of collectors of the triodes. The embodiment of the invention further discloses the I2C bus system. By adopting the embodiment of the invention, the voltage of the chip of the equipment can be matched with the voltage of the I2C bus, hot swapping of the equipment is supported, and the circuit has a simple structure and requires a lower cost.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to an I2C bus isolation circuit and an I2C bus system. Background technique [0002] In the communication power supply, the I2C bus is often used. The I2C (Inter-Integrated Circuit) bus is a two-wire serial bus used to connect microcontrollers and peripheral devices. It is a bus standard widely used in the field of microelectronics communication. [0003] In practical applications, there is often a phenomenon that the power supply voltage of a device that needs to be connected to the I2C bus does not match the bus level. For example, the bus is powered by 5V I2C level signals, while the device requires 3.3V to be powered. At this time, it is necessary to configure a bus level adaptation circuit for the devices whose voltages do not match, so as to connect the devices to the I2C bus. [0004] refer to figure 1 , is a structural diagram of an I2C bus system in the prior art....

Claims

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Application Information

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IPC IPC(8): G06F13/40
Inventor 邓登基侯鹏
Owner HUAWEI DIGITAL POWER TECH CO LTD
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