A decoding method and decoding device thereof

Abstract

The invention discloses a decoding method and a decoding device thereof, relating to the field of error correction of coding for channels. The decoding method comprises three stages of flow line, wherein the first stage is a syndrome calculating unit; the second stage comprises a syndrome updating unit, a KES (Key Equation Solution ) unit and a polynomial selecting unit; the third stage is a Chien search and Forney algorithm unit; the syndrome calculating unit is used for outputting a hard decision receiving sequence to constitute 2 eta test vectors; the syndrome updating unit is used for receiving a syndrome of the hard decision receiving sequence and updating the syndrome; the KES unit is used for calculating error location polynomials and error estimate polynomials; the polynomial selecting unit is used for performing calculation on the 2 eta error location polynomials and error estimate polynomials and judging whether a correct KES result is achieved; and the Chien search and Forney algorithm unit is used for performing error correction on code words according to the error location polynomials and the error estimate polynomials which are selected according to the polynomials.

Description

technical field [0001] The invention relates to the field of channel error correction coding, in particular to a decoding method and a decoding device thereof. Background technique [0002] Reed-Solomon (RS) codes are a class of error-correcting codes with strong error-correcting capabilities, which can correct random errors and burst errors, and have been widely used in digital communications and data storage. There are two decoding methods of RS codes: hard decision and soft decision. The algebraic soft-decision decoding algorithm of RS codes can obtain higher coding gain than the hard-decision decoding algorithm. However, the complexity of soft-decision decoding of RS codes is relatively high, and it is difficult to implement in hardware. In algebraic soft-decision decoding, J. Bellorado and A.Kavcic proposed LCC decoding under the premise of keeping the performance similar to other algebraic soft-decision decoding, see J.Bellorado and A.Kavcic, "A low-complexity metho...

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Problems solved by technology

[0006] The first LCC decoding method: 1) The interpolation step is used to solve the error position polynomial and the error estimation polynomial, but the interpolation algorithm itself is relatively complicated and not easy to implement in hardware. It is the bottleneck of hardware speed and output of LCC RS decoder

At present, the mainstream pipeline LCC RS decoder design uses the number of clock cycles required by the interpolator as the number of decoding clock cycles for the entire pipeline design; on the other hand, due to the complexity of the interpolation algorithm, the control circuit is not easy to design, and the actual It is easy to form a large critical path in the design, reduce the maximum clock frequency of the decoder, and further affect the output speed of the decoder; 2) The calculation steps of the interpolator are complicated, and two sets of interpolation polynomials need to be stored at the same time. Therefore, the interpolator not only A large number of computing units are required, including finite-field multipliers, finite-field adders, and selectors, and a large number of registers are required to store updated polynomials. For example, in order to improve speed, the design of multi-interpolators increases the interpolation steps. hardware resources

[0007] The second LCC decoding method: Although this algorithm is somewhat simplified compared to the interpolation algorithm, it needs to calculate the syndromes of common points and non-common points in different test vectors separately, which not only leads to increased hardware requirements, but also requires more clock cycles to complete the calculation

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