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Time factor and space factor synthesized FPGA (Field Programmable Gate Array) task placement method

A technology that integrates time and tasks. It is used in special data processing applications, instruments, and electrical digital data processing. It can solve problems such as large debris space, poor FPGA utilization, and FPGA generation, so as to reduce space debris and improve space utilization. Effect

Inactive Publication Date: 2015-05-27
SHANGHAI UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] First fit selects the first free block it finds that meets the conditions. This method is more efficient, but it will cause a large amount of fragmented space in the FPGA, resulting in poor FPGA utilization.

Method used

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  • Time factor and space factor synthesized FPGA (Field Programmable Gate Array) task placement method
  • Time factor and space factor synthesized FPGA (Field Programmable Gate Array) task placement method
  • Time factor and space factor synthesized FPGA (Field Programmable Gate Array) task placement method

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Experimental program
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Effect test

Embodiment 1

[0027] The FPGA task placement method that integrates time and space factors is as follows: first abstract the FPGA and the tasks executed on the FPGA into a rectangular block with a certain length and width; then record two time attributes for each newly arrived task: The moment of arrival at the FPGA—referred to as the arrival time and the execution time in the FPGA—referred to as the execution time; finally, by comprehensively considering the arrival time of the task, the execution time and the space matching between the task and the free block, the cost function is designed Choose a suitable placement for the task.

Embodiment 2

[0029] This embodiment is basically the same as Embodiment 1, and the special features are as follows:

[0030] The cost function should take into account the influence of the following factors: (1) in space, the overlapping length of the adjacent task between the newly arrived task and the adjacent task at the placement location; (2) in time, the distance between the newly arrived task and the placement location The degree of overlap between the execution times of adjacent tasks.

[0031] The expression of the cost function is defined as:

[0032]

[0033]

[0034] in

[0035] The meanings of the symbols in the formula are: present_moment is the current moment, Indicates the overlapping length of the adjoining sides of the i-th adjacent task when the newly arrived task is placed in a certain placement position, is the degree of overlap between the newly arrived task and the i-th adjacent task in the time dimension, is the execution time of the i-th adjacent ...

Embodiment 3

[0039] This embodiment is basically the same as Embodiment 2, and the special features are as follows:

[0040] In the FPGA task placement method of the integrated time factor and space factor, the cost function seeking method is as follows:

[0041] (1). Compare the completion time of the newly arrived task (the current moment present_moment plus the execution time of the new task) with the completion time of the i-th task (the actual start time of the i-th task plus the execution time of the task). If the former is larger, then skip to step (2); if the latter is larger, then skip to step (3); if both are the same, then skip to step (4).

[0042] (2). Calculate the overlapping length , overlap for multiplied by a constant , skip to step (5);

[0043] (3). Calculate the overlapping length , overlap For the execution time of the newly arrived task, skip to step (5);

[0044] (4). Calculate the overlapping length , overlap Multiply the execution time for newl...

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Abstract

The invention discloses a time factor and space factor synthesized FPGA (Field Programmable Gate Array) task placement method. The method comprises the steps of: firstly abstracting the FPGA and a task performed on the FPGA into a rectangular block with a certain length and width; then recording two time attributes for each newly arrived task, that is to say, the time when the task arrives to the FPGA (for short, arrival time) and time performed in the FPGA (for short, perform time); and finally, designing a cost function to select a suitable placement position for the task by comprehensively considering the arrival time as well as the perform time of the task and the space matching of the task and a idle block. The time factor and space factor synthesized FPGA task placement method, disclosed by the invention, has the advantages of comprehensively considering the overlapping length of the task and the idle block in the aspects of time and space, enabling the tasks to be placed in the FPGA compactly, thereby reducing idle fragment space inside the FPGA and improving space utilization rate of the FPGA.

Description

technical field [0001] The present invention relates to a method for placing FPGA tasks that integrate time and space factors. More specifically, by comprehensively considering the arrival time, execution time, and space matching of tasks and free blocks, a cost function is set to select a suitable placement for tasks. Location. Background technique [0002] FPGA is composed of reconfigurable resources and has dynamic local reconfigurable characteristics. [0003] FPGA and the tasks executed on FPGA can be abstracted into a matrix with a certain length and width, and each element in the matrix represents a reconfigurable unit. [0004] Each task has two time attributes, that is, the time when it arrives at the FPGA (referred to as the arrival time) and the time when it starts executing in the FPGA (referred to as the execution time). [0005] The process of executing a task in the FPGA includes three steps: first, the CPU selects a reconfigurable resource block with the sa...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 陈雪高英虎张隽丰
Owner SHANGHAI UNIV