Semiconductor packaging structure and manufacturing method thereof
A technology of packaging structure and manufacturing method, applied in semiconductor/solid-state device manufacturing, semiconductor device, semiconductor/solid-state device components and other directions, can solve the problems of very high time and precision control requirements, high cost, etc., to ensure connection quality, The effect of reducing manufacturing costs
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[0015] The following descriptions of the various embodiments refer to the accompanying drawings to illustrate specific embodiments in which the present invention can be practiced. The directional terms mentioned in the present invention, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., are for reference only The orientation of the attached schema. Therefore, the directional terms used are used to illustrate and understand the present invention, but not to limit the present invention.
[0016] In the figures, structurally similar units are denoted by the same reference numerals.
[0017] Please refer to figure 1 , which shows a cross-sectional view of a semiconductor package structure according to an embodiment of the present invention. The semiconductor packaging structure 100 of the present invention includes a substrate 101, a first chip 110, a second chip 120, a third chip 130, a fourth chip 140, a fifth chip 150, a sixth chip 16...
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