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Semiconductor packaging structure and manufacturing method thereof

A technology of packaging structure and manufacturing method, applied in semiconductor/solid-state device manufacturing, semiconductor device, semiconductor/solid-state device components and other directions, can solve the problems of very high time and precision control requirements, high cost, etc., to ensure connection quality, The effect of reducing manufacturing costs

Active Publication Date: 2012-11-14
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since TSV technology needs to drill holes on chips or wafers, the requirements for manufacturing process time and precision control are very high, resulting in a very expensive manufacturing process.

Method used

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  • Semiconductor packaging structure and manufacturing method thereof
  • Semiconductor packaging structure and manufacturing method thereof
  • Semiconductor packaging structure and manufacturing method thereof

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Embodiment Construction

[0015] The following descriptions of the various embodiments refer to the accompanying drawings to illustrate specific embodiments in which the present invention can be practiced. The directional terms mentioned in the present invention, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., are for reference only The orientation of the attached schema. Therefore, the directional terms used are used to illustrate and understand the present invention, but not to limit the present invention.

[0016] In the figures, structurally similar units are denoted by the same reference numerals.

[0017] Please refer to figure 1 , which shows a cross-sectional view of a semiconductor package structure according to an embodiment of the present invention. The semiconductor packaging structure 100 of the present invention includes a substrate 101, a first chip 110, a second chip 120, a third chip 130, a fourth chip 140, a fifth chip 150, a sixth chip 16...

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PUM

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Abstract

The invention provides a semiconductor packaging structure and a manufacturing method thereof. The method for manufacturing the semiconductor packaging structure comprises the following steps of: arranging a first chip on a substrate; arranging a second chip on the first chip; arranging a third chip on the second chip; and connecting the semiconductor packaging structure between an upper surface of the exposed part of the first chip and a lower surface of the corresponding part of the third chip through a plurality of connecting components. According to the semiconductor packaging structure, the manufacturing cost of the stacked chip can be reduced.

Description

technical field [0001] The invention relates to a semiconductor packaging structure and a manufacturing method thereof, in particular to a semiconductor packaging structure of stacked chips and a manufacturing method thereof. Background technique [0002] In the semiconductor production process, integrated circuit packaging (IC package) is one of the important steps in the manufacturing process. It is used to protect the IC chip and provide external electrical connections to prevent damage from external forces or environmental factors during transportation and placement. In today's electronic devices, a single electronic device usually needs to be provided with multiple chips to perform multiple functions at the same time, so as to meet the needs of modern people for electronic devices. However, if a plurality of chips are respectively formed in different packaging structures, the occupied space of the packaging structures will be increased. Therefore, semiconductor structu...

Claims

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Application Information

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IPC IPC(8): H01L23/488H01L21/60H01L25/04
CPCH01L2924/15311H01L2224/73204
Inventor 洪嘉临
Owner ADVANCED SEMICON ENG INC
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