Construction method of low bit-rate quasi-cyclic accumulative repeat accumulate codes

A technology of repeated accumulation and construction methods, which is applied in the direction of error correction/detection using block codes, error detection coding using multiple parity bits, data representation error detection/correction, etc., and can solve problems with low encoding and decoding complexity. Error performance and other issues, to achieve the effect of less coding and decoding delay, moderate complexity, and good performance

Inactive Publication Date: 2012-12-26
ZHEJIANG UNIV
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Problems solved by technology

[0006] The purpose of the present invention is to provide a low bit rate quasi-cyclic accumulation and repetition accumulation code construction method for the def

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  • Construction method of low bit-rate quasi-cyclic accumulative repeat accumulate codes
  • Construction method of low bit-rate quasi-cyclic accumulative repeat accumulate codes
  • Construction method of low bit-rate quasi-cyclic accumulative repeat accumulate codes

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Embodiment Construction

[0021] The present invention proposes a construction method of a low code rate structured quasi-cyclic accumulation and repetition accumulation code, which mainly includes the following process: using the existing heuristic optimization method (see "A. Abbasfar, K. Yao and D. Disvalar, "Accumulate repeat accumulate codes," in Proc. IEEE Globalcom, Nov. 2004, pp. 509-513."), to construct a basic high-performance Accumulate Repeat Accumulate (ARA) code prototype; Several check nodes in the model diagram are extended with check matrixes of short code length linear block codes (such as Hamming codes with a code length less than 15), that is, the expansion of this node adopts the constraints of check matrices of linear block codes with different code lengths and code rates Realization of relationship; the expanded original model graph is copied and repeated to eliminate multiple edges, and the basic bipartite graph is obtained, but the connection relationship between the check node ...

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Abstract

The invention provides a construction method of low bit-rate quasi-cyclic accumulative repeat accumulate codes, wherein an accumulative repeat accumulate code protograph, a check node expanding by a linear block code check matrix, a basic check matrix corresponding to a basic bipartite graph and a cyclic offset searching method of quasi-cyclic approximate cycle extrinsic message degree are comprised. The construction method comprises the following steps of: constructing a basic accumulative repeat accumulate code protograph; expanding the check node of the accumulative repeat accumulate code protograph by using the linear block code check matrix; carrying out copying and repeating processing for eliminating multiple edges to obtain the basic bipartite graph; converting the basic bipartite graph into a matrix, and carrying out square matrix expansion on data in the matrix to obtain a quasi-cyclic matrix; and carrying out optimized searching on cyclic offset of a non-zero cyclic square matrix by using a quasi-cyclic approximate cycle extrinsic message degree method and finishing encoding. The low bit-rate quasi-cyclic accumulative repeat accumulate codes constructed by the construction method disclosed by the invention have the advantages of high performance, moderate complexity, simple encoding and decoding structure and the like and can be applied to a channel encoding occasion in the digital communication field.

Description

technical field [0001] The invention relates to the technical field of digital communication, in particular to a method for constructing a low code rate structured quasi-cyclic accumulation and repetition accumulation code. Background technique [0002] Wireless communication transmission channels mainly include Gaussian white noise channels, Rayleigh channels and other channels. To transmit information in these channels, channel coding is required to achieve high reception quality. At present, modern high-performance codes close to the Shannon limit mainly include Turbo codes, low-density parity-check codes (LDPC) codes, and turbo-like codes that combine the characteristics of the two. [0003] Turbo codes are channel codes close to the Shannon limit. Its main construction idea is how to optimize the interleaver parameters and component codes to obtain a decoding scheme with low error floor and low complexity. Among them, the flat bottom of the bit error rate refers to t...

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Application Information

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IPC IPC(8): H03M13/11
Inventor 包建荣钟杰赵民建吴杰
Owner ZHEJIANG UNIV
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