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AND logic circuit and chip

A logic circuit and chip technology, applied in the electronic field, can solve problems such as the size limitation of MOS tube storage devices, and achieve the effects of programmable performance, fast read and write speed, and strong endurance

Active Publication Date: 2015-05-13
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] And logic circuits are usually based on metal-oxide-semiconductor (MOS, Metal-Oxide-Semiconductor) tube storage devices. As the requirements for chip integration become higher and higher, the size of and logic circuits is also decreasing, but due to MOS Due to the limitation of the size of the storage device itself, the AND logic circuit in the prior art has a minimum size technology node

Method used

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Embodiment Construction

[0024] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0025] Such as figure 1 Shown is a schematic diagram of an AND logic circuit in an embodiment of the present invention.

[0026] The AND logic circuit may include a resistive memristor array 10 and a comparator 11 . In the resistive memristor array 10, the positive phase input terminals of the same column resistance variable memristor 101 are connected, so that the positive phase input terminal of the same column resistance variable memristor 101 is used as the sign...

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Abstract

The embodiment of the invention discloses an AND logic circuit and a chip. The circuit comprises a resistance change memristor array and comparators; the non-inverting input ends of the same line of resistance change memristors in the resistance change memristor array are connected with one another, so that the non-inverting input ends of the same line of the resistance change memristors serve as a signal input end or an auxiliary signal input end of the AND logic circuit; the auxiliary signal input end is connected to a low level when working; inverting input ends of the same row of resistance change memristors in the resistance change memristor array are connected with the input end of a comparator, so that the output end of the comparator serves as a signal output end of the AND logic circuit; when the voltage received by the input end of the comparator is greater than a threshold voltage, the output end of the comparator outputs a high level; and when the voltage received by the input end of the comparator is lower than the threshold voltage, the output end of the comparator outputs the low level. By the embodiment of the invention, the area occupied by the AND logic circuit is saved and simultaneously the programmable performance of the AND logic circuit is realized.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to logic circuits and chips. Background technique [0002] And logic circuits are usually based on metal-oxide-semiconductor (MOS, Metal-Oxide-Semiconductor) tube storage devices. As the requirements for chip integration become higher and higher, the size of and logic circuits is also decreasing, but due to MOS Due to the limitation of the size of the tube storage device itself, the AND logic circuit in the prior art has a minimum size technology node. Contents of the invention [0003] The embodiment of the present invention provides an AND logic circuit and a chip, which are used to solve the problem in the prior art that the AND logic circuit has a minimum size technology node. [0004] In order to solve the above problems, the embodiment of the present invention discloses the following technical solutions: [0005] On the one hand, there is provided an AND logic circuit,...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/20
Inventor 黄如张耀凯蔡一茂陈诚
Owner PEKING UNIV
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