Methods and apparatus for changing a sequential flow of a program using advance notice techniques

A program and process technology, applied in the direction of program control design, address formation of the next instruction, instrument, etc., can solve power increase, processor performance reduction, misprediction instruction processor incorrect speculative acquisition and start instruction processing, etc. question

Inactive Publication Date: 2013-02-13
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Processor performance may be degraded since correcting mispredicted indirect branches often requires backtracing of indirect branch instructions to fetch and execute instructions on the correct branch path
Also, a misprediction indicates that the processor improperly speculatively fetches and begins processing instructions on the wrong branch path, resulting in increased power for processing unused instructions and for flushing them from the pipeline

Method used

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  • Methods and apparatus for changing a sequential flow of a program using advance notice techniques
  • Methods and apparatus for changing a sequential flow of a program using advance notice techniques
  • Methods and apparatus for changing a sequential flow of a program using advance notice techniques

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Embodiment Construction

[0022] The present invention will now be described more fully with reference to the accompanying drawings, in which several embodiments of the invention are shown. However, this invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0023] Computer program code or "program code" for being operated or for carrying out operations in accordance with the teachings of the present invention may initially be written in a high-level programming language such as C, C++, Smalltalk, TSQL, Perl or various other programming languages. A program written in one of these languages ​​is compiled to the target processor architecture by converting high-level program code into native assembler. Programs for the target processor architecture can also be writt...

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PUM

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Abstract

A processor implements an apparatus and a method for providing advance notice of an indirect branch address. A target address generated by an instruction is automatically identified. A next program address is prepared based on a most current target address before an indirect branch instruction utilizing the most current target address is speculatively executed. The apparatus suitably employs a register for holding an instruction memory address that is specified by a program as a most current indirect address of an indirect branch instruction. The apparatus also employs a next program address selector that selects the most current indirect address from the register as the next program address for use in speculatively executing the indirect branch instruction.

Description

technical field [0001] The present disclosure relates generally to techniques for processing instructions in a processor pipeline, and more particularly to techniques for generating an early indication of a target address of an indirect branch instruction. Background technique [0002] Many portable products, such as cell phones, laptop computers, personal data assistants (PDAs) or the like, require the use of processors that execute programs that support communication and multimedia applications. A processing system for these products includes a processor, a source of instructions, a source of input operands, and memory space for storing the results of execution. For example, instructions and input operands may be stored in a hierarchical memory arrangement consisting of general purpose registers and multiple levels of cache memory, including, for example, instruction cache, data cache, and system memory. [0003] To provide high performance in the execution of programs, p...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/32G06F9/30G06F9/38
CPCG06F9/30058G06F9/30003G06F9/30101G06F9/3842G06F9/3804G06F9/322G06F9/30061G06F9/38G06F9/32
Inventor 詹姆斯·诺里斯·迪芬德尔费尔迈克尔·威廉·莫罗
Owner QUALCOMM INC
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