Electrostatic discharge circuit with low-noise interference for interior of chip
An electrostatic discharge protection and low-noise technology, which is applied to circuits, electrical components, and electric solid-state devices, can solve problems such as processing defects and main circuit failures, and achieve the effect of reducing noise interference
Inactive Publication Date: 2013-02-27
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
View PDF2 Cites 2 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
However, there are defects in this processing method, especially when the I / O pin is connected to a high-frequency signal, the high-frequency signal passes through the parasitic inductance L of the Bonding line 2 After that, serious high-frequency noise will be generated, and the noise passes through the parasitic capacitances (C gd ) is coupled to the VDDA pad and GNDA pad, and then enters the main circuit, which may even cause the main circuit to fail to work properly
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0022] The implementation of the present invention will be illustrated by specific specific examples below, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.
[0023] see Figure 2 to Figure 4 . It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification, for those who are familiar with this technology to understand and read, and are not used to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. The disclosed technical content must be within the scope covered. At the sa...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention provides an electrostatic discharge protective circuit with low-noise interference for the interior of a chip. The electrostatic discharge circuit protective circuit is arranged in the chip, the chip comprises a main circuit, and a first power supply end and a first ground end which are connected with the main circuit; the electrostatic discharge protective circuit at least comprises an electrostatic discharge protective circuit unit connected with the main circuit, a second power supply end and a second ground end which are connected with the electrostatic discharge protective circuit, and a plurality of bonding lines used for respectively connecting the first power supply end to a first power supply pin, connecting the first ground end to a first ground pin, connecting the second power supply end to a second power supply pin, and connecting the second ground end to a second ground pin. The electrostatic discharge protective circuit with the low-noise interference for inside of the chip has advantage that the noise interference caused to the main circuit can be effectively reduced.
Description
technical field [0001] The invention relates to the field of integrated circuits, in particular to an electrostatic discharge protection circuit with low noise interference inside a chip. Background technique [0002] Electrostatic discharge (ESD) protection circuits are installed at the input / output ports and power ports of current semiconductor chips to protect the semiconductor chips from high voltage damage caused by external static electricity. A common ESD protection circuit and its Bonding line effective circuit such as figure 1 As shown, the left half is the ESD protection circuit, and the right half is the equivalent circuit diagram of the pad (PAD) inside the chip connected to the package pin (PIN pin) through the Bonding line. The ESD protection circuit is composed of diode-connected PMOS transistor P1 and NMOS transistor N1 connected in series. The source terminal (source), gate terminal (gate) and body terminal (body) of PMOS transistor P1 are connected to the ...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02
Inventor 王倩陈后鹏许伟义蔡道林金荣宋志棠
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI