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Fine granularity memory access method

A memory access, fine-grained technology, applied in memory address/allocation/relocation, memory systems, instruments, etc., can solve problems such as unsatisfactory effects and inability to reduce losses, and achieves reduction of average write times, overhead, and reduction. The effect of power consumption

Active Publication Date: 2013-03-27
TSINGHUA UNIV
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0003] The current fine-grained memory access mechanism focuses on the implementation of DRAM (Dynamic Random Access Memory), the purpose is to better mine spatial locality in a multi-core processor environment to improve the efficiency of memory access, but the effect is not ideal
For devices with write loss, such as NAND-FLASH and phase change memory, none of the existing memory access methods can reduce the loss

Method used

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Embodiment Construction

[0032] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0033] Such as figure 1 , figure 2 As shown, the present invention provides a method for fine-grained memory access, comprising the following steps:

[0034] S1. Define the fine-grained cache dirty bitmap as follows: the fine-grained cache dirty bitmap uses one or more bits to identify whether the content of one or more 8-bit storage units in a row of the cache data area is It is different from the initial value at the time of reading, that is to say, a value different from the original value has been written; the cache data area is a data area of ​​a storage device with write loss (or a storage device without write loss); Such as image 3 shown. image 3 , each bit ...

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Abstract

The invention relates to the technical field of computer system structures, and discloses a fine granularity memory access method. Invalid transmission is prevented by marking modified data and zero data in byte level, and therefore, bandwidth occupation from a high-speed cache data area to a memory is reduced, and cost of additional writing is reduced; and in addition, for a memory device with writing loss, when the method is adopted, mean writing times can be reduced, service life can be prolonged and simultaneously power consumption can be reduced.

Description

technical field [0001] The invention relates to the technical field of computer system structure, in particular to a fine-grained memory access method. Background technique [0002] The rate at which computer memory improves performance lags far behind the rate at which processor performance improves. Compared with the processor, the memory access delay increases at a rate of 5 times every ten years. The imbalance of this system structure forms a "storage wall" that hinders the performance improvement of the processor, thus making the memory system become the performance of the entire computer system. One of the bottlenecks. In order to solve this problem, many new memory technologies have been proposed, and fine-grained memory access is one of them. Fine-grained memory access can precisely control each memory chip, avoid additional read and write, and save bandwidth. [0003] The current fine-grained memory access mechanism focuses on the implementation of DRAM (Dynamic ...

Claims

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Application Information

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IPC IPC(8): G06F12/08G06F12/0877
CPCY02B60/1225Y02D10/00
Inventor 汪东升高鹏王海霞
Owner TSINGHUA UNIV
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