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Method for verifying MMU (Memory Management Unit) in SOC (System On Chip)

A verification method and chip technology, applied in special data processing applications, instruments, electrical digital data processing, etc., to achieve the effect of flexible configuration

Active Publication Date: 2013-03-27
FUZHOU ROCKCHIP SEMICON
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  • Description
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AI Technical Summary

Problems solved by technology

[0004] In the past, the MMU was usually only used for the CPU, and the verification environment also specifically verified the MMU structure of the CPU. At present, there is a lack of a general verification method that can be used to verify the MMU of various IPs.

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  • Method for verifying MMU (Memory Management Unit) in SOC (System On Chip)

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Embodiment Construction

[0029] Such as figure 1 Shown, a kind of verification method of the MMU in the SOC chip comprises the steps:

[0030] Step 1: Fill in the dedicated circuit configuration file to describe the behavior of the dedicated circuit initiating transmission;

[0031] In the special circuit configuration file, it is configuration information for configuring the behavior of the special circuit to initiate transmission;

[0032] The behavior of the dedicated circuit initiating transmission may include multiple transmission behaviors, including different burst transmission lengths, different data bit widths, etc.;

[0033] Step 2: Fill in the MMU configuration file to describe the storage address of the page table in the memory model and the size of the page table;

[0034] The MMU configuration file includes the storage address of the page table in the memory model, and the information of the page table size;

[0035] The memory model is responsible for storing data, including a page t...

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Abstract

The invention discloses a method for verifying an MMU (Memory Management Unit) in an SOC (System On Chip). The method comprises the steps that a page table generation unit generates a page table file after reading a page table configuration file, and a memory model initializes and stores the page table file in a page table memory address appointed in an MMU configuration file; a special circuit behavior generation model automatically reads a special circuit configuration file, and initiates a read-write transmission behavior according to the special circuit configuration file; the MMU to be verified designs and automatically reads the MMU configuration file, accepts the transmission behavior initiated by the special circuit behavior generation model, reads page table information from the page table memory address in the memory model, maps virtual and real addresses, and initiates a post-map address transmission behavior; a C model code reads an original address file and a page table generation configuration file, and generates an expected post-map address file; and a file comparison unit automatically reads a practical post-map address file and the expected post-map address file, compares the two files, and outputs a verification result whether to be correct or not.

Description

【Technical field】 [0001] The invention belongs to the field of integrated circuits, and specifically refers to a method for verifying an MMU in an SOC chip. 【Background technique】 [0002] MMU is the abbreviation of Memory Management Unit. The Chinese name is memory management unit. It is traditionally considered to be the control line used to manage virtual memory and physical memory in the central processing unit (CPU). It is also responsible for mapping virtual addresses to physical addresses, and Provides hardware-based memory access authorization. [0003] With the advancement of technology, a large number of ultra-large-scale SOC chips appear. There are a large number of independent special-purpose processing circuit modules in the SOC, such as graphics and image processing circuits, which require more and more memory space. If the virtual address space is not used, the operating system is very difficult. It is difficult to open up a continuous physical address space ...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 廖裕民
Owner FUZHOU ROCKCHIP SEMICON
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