Piezoelectric valve drive amplifier circuit
A technique for amplifying circuits and piezoelectric valves, which is applied in the direction of valve operation/release devices, valve details, valve devices, etc., and can solve problems such as inability to output signal control
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Embodiment 1
[0028] figure 1 A piezoelectric valve drive amplifier circuit diagram provided in Embodiment 1 of the present application.
[0029] Such as figure 1 As shown, the piezoelectric driving amplifying circuit includes: two first logic circuits 1 and two second logic circuits 2, wherein, the two first logic circuits 1 and the two second logic circuits 2 are all A first MOS transistor M1, a second MOS transistor M2, a first resistor R1, a second resistor R2, an inductor L and a Zener diode ZD are provided, and each of the first logic circuits 1 is also provided with a logic NOT gate X.
[0030] The connection relationship of each device in the two second logic circuits will be introduced below.
[0031] The drain of the first MOS transistor M1 is connected to the first reference voltage terminal. In the embodiment of the present application, the voltage of the first reference voltage terminal may be 24V. The source of the first MOS transistor M1 is connected to one end of the ind...
Embodiment 2
[0041] figure 2 A piezoelectric valve drive amplification circuit diagram provided in Embodiment 2 of the present application.
[0042] Such as figure 2As shown, the piezoelectric valve driving amplifying circuit provided by the present application includes two first logic circuits 1, two second logic circuits 2 and switch circuits 3, wherein the two first logic circuits 1 and the two second logic circuits 2 is the same as the structure of the two first logic circuits 1 and the two second logic circuits 2 in Embodiment 1, and will not be repeated here.
[0043] The switch circuit includes a third MOS transistor M3, a third resistor R3, a fourth resistor R4 and a fifth resistor R5.
[0044] In the embodiment of the present application, the other end of the second resistor R2 in a first logic circuit is connected with the other end of the second resistor R2 in a second logic circuit as a common end, and the drain of the third MOS transistor M3 pole is connected to the commo...
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