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Substrate processing apparatus and substrate processing method

A substrate processing device, substrate processing method technology, applied in the direction of thin material processing, transportation and packaging, electrical components, etc., to achieve the effect of preventing large-scale and improving productivity

Active Publication Date: 2013-04-03
TOKYO ELECTRON LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The transfer mechanism is respectively close to the mounting table set at the entrance of each unit area, so that the wafer is transported between the loading area and the unit area by means of the mounting table, but the mounting table approached by one transfer mechanism is limited to one unit area The mounting table does not solve the above problems

Method used

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  • Substrate processing apparatus and substrate processing method
  • Substrate processing apparatus and substrate processing method
  • Substrate processing apparatus and substrate processing method

Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach

[0066] First, a first embodiment of the present invention will be described. The substrate processing apparatus of the first embodiment is configured as a coating and developing apparatus 1 . This coating and developing device is connected to an exposure device to form a resist pattern forming system. figure 1 is a top view of the above resist pattern forming system, figure 2 is a schematic stereogram thereof, image 3 is a schematic side view thereof. The coating and developing device 1 is constructed by connecting the carrying area A1, the processing area A2 and the transfer area A3 in a straight line. An exposure device A4 is also connected to the side of the transition area A3 opposite to the processing area A2. In this example, the exposure apparatus A4 exposes the wafer W in a gaseous state between the exposure lens and the wafer W as a substrate. The coating and developing apparatus 1 includes processing units corresponding to the exposure apparatus A4. In additi...

no. 2 Embodiment approach

[0125] Hereinafter, other embodiments will be described focusing on differences from the first embodiment. Figure 18 It is a front view of the carrying area A5 of 2nd Embodiment. The carrier area A5 includes carrier moving mechanisms 81A, 81B instead of the carrier moving mechanisms 26A, 26B. Groove portions 82 , 82 are formed on the support table 14 toward the carrier placement portions 15A, 15B from positions corresponding to the aforementioned carrier temporary placement portions 17A, 17B, respectively. Carrier bottom surface support parts 83 for constituting the carrier moving mechanisms 81A and 81B are respectively provided in the groove parts 82 and 82 .

[0126] Since the carrier moving mechanisms 81A and 81B have the same structure as each other, here, as a representative, also refer to the section showing the top view of the carrier moving mechanism 81A. Figure 19 The carrier moving mechanism 81A will be described. The carrier bottom surface support portion 83 ca...

no. 3 Embodiment approach

[0131] Figure 22 , Figure 23 It is a front view and a longitudinal sectional plan view of the loading area A6 of 3rd Embodiment. The differences from the loading area A1 will be described. In this loading area A6, the upper support stands 31C and 31D are not provided, and the supporting base 14 is formed across from the front surface side to the side surface side of the loading area A6. Transport ports 12C and 12D for transporting the wafer W are formed on both side surfaces of the loading area A6, and the transport ports 12A to 12D are provided at the same height, for example. Carrier mounting portions 15C, 15D are provided corresponding to the transport ports 12C, 12D. When the loading area A6 is seen from the front, the carrier loading parts 15C and 15D can move left and right between the unloading position and the loading position. Moreover, in this example, each corner part of the support stand 14 is comprised as carrier temporary placement part 17A, 17B.

[0132] T...

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Abstract

A substrate processing apparatus includes: a carrier block including first and second carrier placement units spaced apart in a right and left direction; a processing block having a layered structure in which a plurality of layered parts are vertically arranged, the layered parts each including a substrate transport mechanism for transporting a substrate and a processing module for processing a substrate; a tower unit including plural substrate placement units located at height positions where a substrate is transferred by the substrate transport mechanism of the layered part corresponding to the substrate placement unit; a first substrate transfer mechanism configured to transfer a substrate between the carrier on the first carrier placement unit and the substrate placement unit of the tower unit; and a second substrate transfer mechanism configured to transfer a substrate between the carrier on the second substrate placement unit and the substrate placement unit of the tower unit.

Description

technical field [0001] The present invention relates to a substrate processing device and a substrate processing method for taking out a substrate from a carrier and processing the substrate. Background technique [0002] The photoresist process, which is one of the semiconductor manufacturing processes, is carried out by using a substrate processing apparatus including a carrier area for carrying a carrier containing a plurality of semiconductor wafers (hereinafter referred to as wafers), A processing area for processing wafers transferred from the carrier area. [0003] In some cases, a plurality of unit areas for coating processing for coating processing such as resists and a unit area for developing processing for performing development processing are stacked up and down to form the above-mentioned structure. processing area. In this case, a group of stacked stages for transferring wafers to and from each unit block is provided on the rear side (processing block side) ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/67
CPCH01L21/67178H01L21/67745H01L21/67766H01L21/67769H01L21/67781H01L21/68707Y10S414/137Y10S414/139
Inventor 榎木田卓中原田雅弘宫田亮木山秀和饭田成昭
Owner TOKYO ELECTRON LTD