Device and method of local oscillator leakage fast calibration

Abstract

The invention provides a device and a method of local oscillator leakage fast calibration. The device and the method of local oscillator leakage fast calibration comprises a mixer, an analog to digital converter (ADC) circuit, field programmable gate array (FPGA), and a processor and a discretionary access control (DAC) register. The mixer is used for frequency conversion of a feedback signal formed by a local oscillator signal transmitted from a transmitter to generate an intermediate frequency signal. The ADC circuit is used for converting the intermediate frequency signal to a digital signal. The FPGA is used for collecting the digital signal and meanwhile calculating and accumulating in-phase / quadrature (I / Q) data. The processor is used for calculating local oscillator power according to results of calculating and accumulating. The DAC register is used for correcting local oscillator leakage direct current according to the local oscillator power. Through the device and the method of local oscillator leakage fast calibration, interference and miscalculation of feedback direct current leakage to transmitted direct current leakage can be avoided, and correction time of local oscillator leakage direct current can be shortened greatly.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to a device and method for quickly correcting local oscillator leakage. Background technique [0002] In low-IF or zero-IF transmitter architectures, LO leakage is unavoidable. In different applications, LO leakage can have negative effects. For example, in a wideband RRU, since there is no dielectric filter to attenuate LO, intermodulation will occur with the carrier signal at the power amplifier, endangering the reliability of the power amplifier. In zero-IF, LO leakage directly deteriorates the transmit signal SNR and affects EVM. [0003] Therefore, it is necessary to suppress the LO leakage to a reasonable range to ensure the indicators and normal operation of the transmitter. [0004] The board has been calibrated before leaving the factory, and this value is an ideal value at room temperature. In the actual RRU operation process, the temperature range is 85...

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Problems solved by technology

[0008] The FPGA collects the feedback signal to the DSP. Although the DSP can accurately calculate the size of the DC signal by taking advantage of the accuracy of floating-point calculations, the FPGA needs to save the collected data in the RAM, and then notify the DSP to fetch the data. After the DSP fetches the data Recalculation greatly delays the calculation cycle of a local oscillator leakage. Therefore, in the current RRU production test of the existing algorithm, there is a problem that the calibration cycle is too long, which is not conducive to RRU production. Secondly, if the external temperature changes sharply, the slow Calculations make the calibration results not real-time

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