Bit line gating device

Abstract

A bit line gating device comprises seventeen gating units, ten control signal units, nine bit lines and four signal supply units. Each gating unit is provided with three connection ports, namely, a control signal unit connection port, a bit line connection port and a signal supply unit connection port. The control signal unit connection port of one gating unit or the control signal unit connection ports of two gating units are connected with one control signal unit; the control signal unit connection ports of a plurality of gating units are connected with one signal supply unit. The bit line connection port of one gating unit or the bit line connection ports of two gating units are connected with the same bit line. According to the bit line gating device, by means of the specific circuit connection relationship, only two or three gating control signals need to be used to start four gating units to achieve the gating of any four continuous bit lines in operation each time, and therefore the condition that four gating control signals need to be used to start four gating units to achieve the gating of four continuous bit lines in a traditional scheme is simplified.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a bit line gating device. Background technique [0002] The gating device is one of the important modules for reading and testing operations on the memory array. The gating device usually includes a word line gating device and a bit line gating device. The word line gating device is used to open the memory cell, and the bit line gating device The pass means is used to apply operation signals to the memory cells. With the increasing demand for high-density storage arrays, storage arrays with virtual land structures are more and more widely used in storage devices. The main feature of the memory array with virtual ground structure is that: the bit line connection port of memory cells in each column in the memory array with virtual ground structure shares the same bit line with the bit line connection ports of memory cells in adjacent columns. [0003] When performing a rea...

AI Technical Summary

Problems solved by technology

However, in view of the fact that one gate control signal can only gate one bit line, four gate control signals are required to gate four consecutive bit lines, and using more gate control signals means increasing the design complexity of the decoder. often results in inefficient gating

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