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Data packet entry and exit management method and data packet processing device

A technology of a processing device and a management method, applied in the field of communication, to achieve the effect of ensuring accuracy

Inactive Publication Date: 2017-10-13
ZTE CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The cache release in this method needs to use the CPU to query the packet information, and there are certain limitations for the packets that do not report to the CPU.

Method used

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  • Data packet entry and exit management method and data packet processing device
  • Data packet entry and exit management method and data packet processing device

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Embodiment Construction

[0021] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer and clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0022] Such as figure 1 As shown, it is a flow chart of a preferred embodiment of the data packet entry and exit management method of the present invention. This embodiment specifically includes the following steps:

[0023] Step S001: According to the maximum number of multicast copies of data packets supported by the data packet processing device, set the initial enqueue times for the data packets processed by the data packet processing device;

[0024] The number of enqueues refers to the number of data packets that can enter the queue after being c...

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Abstract

The invention discloses a data packet entry and exit management method and a data packet processing device. According to the maximum number of multicast copies of the data packet supported by the data packet processing device, the method sets the initial entry times for the data packet, and The above-mentioned initial enqueue times are initialized in the external memory, when the data packets are enqueued or dequeued, the enqueue times are updated, and it is judged whether the PMAU of the above-mentioned data packets needs to be recycled, and if so, the PMAU of the above-mentioned data packets is reclaimed; the above-mentioned device It includes an initialization module, an enqueue times update module and a PMAU recycling module. The invention guarantees the accuracy of allocation and recovery of buffer addresses of different types of data packets and the stability of the system.

Description

technical field [0001] The invention relates to the communication field, in particular to a data packet enqueue and dequeue management method based on pipeline processing and a data packet processing device. Background technique [0002] Due to the development of data communication technology, more and more services are carried by data exchange chips. Under the requirements of technical indicators such as large data throughput and multi-level scheduling, simple on-chip data exchange can no longer meet the current needs. Under this condition, the usual design idea is to store the data packets in the off-chip memory, and manage the data packets in the form of queues in the chip, so the management method of entering and exiting the queue of data packets is very important. [0003] The data packet is stored in the off-chip memory, and the data packet is managed through the on-chip cache address, but the packet descriptor, that is, the data representing other information of the p...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/863
Inventor 石鹏朱泽奇
Owner ZTE CORP